Abstract: Disclosed are a shift register, and a gate driving circuit including a plurality of shift registers connected in sequence to respectively supply scan signals to a plurality of gate lines of a display device. Each shift register includes: an input unit which outputs a directional input signal having a gate high or low voltage based on an output signal from a previous or subsequent shift register to a first node; an inverter unit which is connected to the first node, generates an inverting signal to a signal at the first node, and outputs the inverting signal to a second node; and an output unit which includes a pull-up unit connected to the first node and activating an output clock signal based on the signal at the first node, and a pull-down unit activating and outputting a pull-down output signal based on a signal at the second node.

Abstract: A transparent piezoelectric sheet-with-a-frame includes a transparent piezoelectric sheet and a frame covering a peripheral edge portion of the transparent piezoelectric sheet. The transparent piezoelectric sheet includes one transparent piezoelectric film including an organic polymer, one first transparent plate electrode placed on a first main surface of the transparent piezoelectric film and having a first transparent plate electrode portion, and one second transparent plate electrode placed on a second main surface of the transparent piezoelectric film and having a second transparent plate electrode portion. An outline of the second transparent plate electrode portion is positioned inside an outline of the first transparent plate electrode portion as seen in a plan view. The outline of the first transparent plate electrode portion completely coincides with the frame, and the outline of the second transparent plate electrode portion does not at all coincide with the frame as seen in the plan view.

Abstract: A gate driver includes a plurality of stages, wherein an n-th stage includes: a pull-up unit configured to output a high voltage of a clock signal as a high voltage of an n-th gate signal; a pull-down unit configured to decrease the high voltage of the n-th gate signal to a first low voltage; a discharging unit configured to discharge a voltage of the first node to a second low voltage lower than the first low voltage; a carry unit configured to output the high voltage of the clock signal as an n-th carry signal; an inverter unit configured to output a signal in synchronization with the clock signal; a first node storage unit configured to maintain the voltage of the first node at the second low voltage; and a second node storage unit configured to maintain the voltage of the second node at the first or second low voltage.

Abstract: An input apparatus includes a pointing device which has a main unit and an operation unit, and a fixing unit which fixes the pointing device to a hand. The pointing device is attached to the hand via the fixing unit when the input apparatus is used. The fixing unit fixes the main unit to the thumb side or the back side of the hand when the input apparatus is attached to the hand.