Patents Examined by Douglas Witle
  • Patent number: 6437438
    Abstract: The present invention is a method and apparatus to limit eddy current in a thermal plate. A plate is coupled to a die of an integrated circuit for thermal dissipation. The plate has first and second pluralities of grooves comprising non-periodic lines in first and second directions, respectively. The first and second pluralities of grooves form a grid pattern.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: August 20, 2002
    Assignee: Intel Corporation
    Inventor: Robert A. Braasch