Abstract: An apparatus for controlling light includes a non-transparent surface for blocking incident light, an array of first lenses for focusing the incident light upon the non-transparent surface, an array of shutters corresponding to the array of first lenses and positioned on the non-transparent surface for controlling passage of the incident light through the non-transparent surface, and an array of second lenses corresponding to the array of shutters for collimating the incident light passing through the shutters. The shutters are separated from the first lenses by a distance equal to a focal distance of the first lenses such that the incident light is focused by the first lenses onto the shutters. As such, the shutters may be opened and closed to control the intensity of the incident light passing therethrough.

Abstract: A vertical channel field effect transistor and a process of manufacturing the same. The vertical channel field effect transistor is disposed on a surface of a substrate and comprises an epitaxial silicon stack having a bottom terminal comprising heavily doped silicon, a channel comprising lightly doped silicon of opposite doping type from the bottom terminal, and a top terminal comprising heavily doped silicon of the same doping type as the bottom terminal. The vertical channel field effect transistor also comprises a gate dielectric layer covering at least a portion of the bottom terminal, the channel, and the top terminal, and a gate in contact with the gate dielectric layer. The gate is positioned adjacent the channel and adjacent at least a portion of the bottom terminal and top terminal. The channel has a thickness between the bottom terminal and the top terminal from about 50 angstroms to about 800 angstroms.

Abstract: The present invention is to provide a method for fabricating a CMOS image sensor, including, the steps of providing a semiconductor layer of a first conductive type; exposing a portion of the semiconductor layer, thereby defining a light sensing area in which a photodiode is formed; growing an epitaxial layer on the exposed semiconductor layer; implanting impurities of a second conductive type into the grown epitaxial layer, thereby forming a second type diffusion layer; implanting impurities of the first conductive type into the grown epitaxial layer so that a first type diffusion layer is formed in the second type diffusion layer, wherein a thickness of the first conductive diffusion layer formed is thinner than that of the second type conductive diffusion layer; and patterning the grown epitaxial layer.