Patents Examined by Duy-Vr Deo
  • Methods of forming a gate stack that is void of silicon clusters within a metallic silicide film thereof
    Patent number: 6677241
    Abstract: A method for forming a gate stack which minimizes or eliminates damage to the gate dielectric layer and/or silicon substrate during the gate stack formation by the reduction of the temperature during formation. The temperature reduction prevents the formation of silicon clusters within the metallic silicide film in the gate stack which has been found to cause damage during the gate etch step. The present invention also includes methods for dispersing silicon clusters prior to the gate etch step.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: January 13, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Pai-Hung Pan, Louie Liu, Ravi Iyer