Patents Examined by Dwin M. Craig
  • Patent number: 7596484
    Abstract: A method and apparatus is provided for network node emulation, including a node emulator, comprising a node interface, a memory, and a CPU. A method of generating an emulated network node includes the steps of generating an emulation script using a network node emulation language and operating a computer device according to the emulation script in order to transmit and receive data packets in the computer device. The method comprises receiving an incoming message, transmitting an outgoing message, and recognizing a response requirement in the incoming message. The method comprises responding to the incoming message by transmitting a response outgoing message if the incoming message includes a response requirement.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: September 29, 2009
    Assignee: ITT Manufacturing Enterprises, Inc.
    Inventors: Amit J. Patel, Neil K. Salant
  • Patent number: 7343276
    Abstract: A computer readable medium includes computer executable code stored thereon, the code for estimating power consumption of an integrated circuit, comprising code for simulating logic of basic and mega cells of the integrated circuit, code for estimating a current consumed by the mega cells by obtaining logic states for each mega cell, determining an average operation frequency for each logic state, and determining an alternating current component and a direct current component for each logic state to calculate said current consumed by the mega cells for estimating a first value of electric power consumed by said mega cells based on said logic simulations and pre-established power consumption data, code for estimating a current consumed by the basic cells for estimating a second value of electric power consumed by said basic cells based on said logic simulations and pre-established power consumption data and code for combining said first and second values to obtain the power consumption of the integrated circui
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: March 11, 2008
    Assignee: Ricoh Company, Ltd.
    Inventors: Yasutaka Tsukamoto, Hidetaka Minami
  • Patent number: 7260508
    Abstract: A method and system are disclosed for high-resolution modeling of a well bore in a reservoir. An embodiment of the present disclosure comprises the steps of constructing a first unstructured mesh having a plurality of n-dimensional simplices corresponding to a first modeled system (space), defining a surface bounding a second modeled space, identifying a subset of the plurality of n-dimensional simplices of the first mesh that are intersected by the surface, and modifying the subset of simplices so as to adapt the first mesh such that it comprises a second mesh and a third mesh, wherein the second mesh comprises a set of simplices located entirely interior to the surface and wherein the third mesh comprises another set of simplices located entirely exterior to said surface.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: August 21, 2007
    Assignee: Object Reservoir, Inc.
    Inventors: Kok-Thye Lim, Steven B. Ward, Stephen R. Kennon
  • Patent number: 7158923
    Abstract: A method of integrating product information management with vehicle design includes the steps of selecting a vehicle program requirement from a library stored in a memory of a computer system, wherein the library is accessed through an information portal on the computer system. The method also includes the steps of selecting an information database containing information related to the design of the vehicle from the library, wherein the information database is accessed through the information portal, and determining if the information from the information database correlates with the program requirement. The method further includes the steps of using the information from the information database in the design of the vehicle, if the information from the information database correlates with the program requirement.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: January 2, 2007
    Assignee: Ford Global Technologies, LLC
    Inventors: Krishna Murthy, Michael E. Stoeckle, Devang Desai
  • Patent number: 7139693
    Abstract: An interface to one or more hardware devices includes a configuration library and objects to model the hardware. Software programs using the interface need not understand how to communicate with the hardware. Instead, the software programs may communicate with the interface. In turn, the interface communicates with the hardware. The software may be written when the hardware implementation features are unknown.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: November 21, 2006
    Assignee: Intel Corporation
    Inventors: Steven C. Dake, Paul E. Luse
  • Patent number: 7136790
    Abstract: A method and system are disclosed for enabling design of a product such as a colored plastic having a visual effect caused by an additive. In one embodiment, a user such as a designer at a first computing unit is able to interact with a second computing unit operable to provide a generally accurate representation of the product having the visual effect. Desirably, the user inputs information relating to the additive such as a flake material or a diffuser material and the system provides a representation displayable on a display or monitor of the first computing unit of the product having the visual effect based on the information relating to the additive. The design of the product having the visual effect is advantageously stored on the second computing unit and accessible by at least one second user such as a marketer or manufacturer for review of the design.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: November 14, 2006
    Assignee: General Electric Company
    Inventors: Stanley Young Hobbs, John Frederick Graf
  • Patent number: 7133822
    Abstract: A system and method for diagnosing an electronic device remotely using a network is provided. The electronic device includes one or more programmable logic devices that are configurable. A diagnostic microcontroller functions to communicate to the programmable logic devices and to communicate to the network. To diagnose the electronic device, communication is established to the network and to a diagnostic/repair center. The diagnostic/repair center selects diagnostic commands and transmits them to the electronic device. The diagnostic microcontroller initiates the diagnostic commands on the one or more programmable logic devices to test their configuration and/or functionality. Test results are collected and transmitted back to the diagnostic/repair center for analysis. Based on the analysis, if appropriate, reconfiguration commands are sent to reconfigure the programmable logic device to correct identified errors.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: November 7, 2006
    Assignee: Xilinx, Inc.
    Inventor: Neil G. Jacobson
  • Patent number: 7124064
    Abstract: An apparatus and method of implementing a circuit representing a complex polynomial equation in a hardware description language (HDL) for implementing an ASIC (Application Specific Integrated Circuit) is provided. A serial circuit representing the complex polynomial equation is implemented in a software program. The serial circuit implementation is simulated to produce a plurality of parallel equations that are mapped into HDL with ASCII strings. In one embodiment, the complex polynomial equation is a Bose-Chaudhuri-Hocquenghem (BCH) code utilized in forward error correction circuitry.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: October 17, 2006
    Assignee: Cisco Technology, Inc.
    Inventor: Andrew J. Thurston
  • Patent number: 7120514
    Abstract: The present invention provides for a method and an apparatus for performing field-to-field compensation during semiconductor manufacturing. At least one semiconductor device is processed. Metrology data is collected from the processed semiconductor device. A field-to-field metrology analysis is performed based upon the metrology data. Residual-error analysis is performed based upon the field-to-field analysis.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: October 10, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher A. Bode, Joyce S. Oey Hewett
  • Patent number: 7113900
    Abstract: A modeling system permits developers of applications for distributed computer system, such as those used in server data centers or Internet data centers (IDCs), to architect their hardware and software in an abstract manner. The modeling system defines a set of components that represent abstract functional operations of the application that will eventually be physically implemented by one or more computers and one or more software programs executing on the computers. Associated with the model components is a schema that dictates how the functional operations are to be specified. From the model components, the developers can create logical, scale-independent models of the applications that may be implemented by the distributed computer system. The application is scale-independent in that the application is invariant in respect to the number of computers and software programs that my eventually be used to implement it.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: September 26, 2006
    Assignee: Microsoft Corporation
    Inventors: Galen C. Hunt, Aamer Hydrie, Robert V. Welland, Bassam Tabbara, Steven P. Levi, Jakob Rehof
  • Patent number: 7113902
    Abstract: In support of data processing emulation, a data processing condition indicated by a predetermined number of digital data processing signals can be detected by applying the digital data processing signals to a lookup table (LUT) that is programmable according to how the digital data processing signals (23) indicate the data processing condition. The lookup table is responsive to said digital data processing signals for determining whether said data processing condition exists.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: September 26, 2006
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Patent number: 7110926
    Abstract: A method for determining coil spring force line range corresponding to specific damper friction values using a universal spring mechanism and using the determined force line range in coil spring design. The method includes securing the mechanism to a suspension system including a damper, providing a controller for controlling actuator legs thereof for exerting force between upper and lower seats of the mechanism, and performing a capability study of the mechanism. The method further includes determining a desired coil spring force line position based upon the capability study, activating the mechanism to generate a desired coil spring force line based upon the desired coil spring force line position, performing damper friction measurements for determining a coil spring force line position for minimizing damper friction, determining the coil spring force line range based upon the damper friction measurements, and designing a coil spring based upon the coil spring force line range.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: September 19, 2006
    Assignee: NHK International Corp.
    Inventors: Shinichi Nishizawa, Jason Logsdon
  • Patent number: 7110929
    Abstract: A simulation template and method therefor is disclosed that modifies a SPICE netlist that describes a circuit in order to provide customized or pre-installed additional analysis. More specifically, a simulation template is an interactive command language (ICL) script that has embedded instructions telling a netlist where to insert information and which options are to be provided. It is used to expand SPICE beyond the traditional limitations of the basic alternating current (AC), direct current (DC), and transient analysis by allowing parameter variations and multiple simulations passes to be run under one analysis umbrella. Such additional analysis employing parameter variations and multiple analysis passes include sensitivity analysis, root means square (RSS) analysis, extreme value analysis (EVA) and worst case sensitivity (WCS), to name a few.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: September 19, 2006
    Assignee: Intusoft
    Inventor: Lawrence G. Meares
  • Patent number: 7110931
    Abstract: An advanced electronic signal conditioning circuit and associated housing elements. In one embodiment, the circuit comprises a plurality of coupled inductors and capacitors arranged in a signal filtering configuration which achieves enhanced voice- and DSL-band performance through the use of complex-impedance modeling during the circuit design phase. Free-standing and fixed device housings are also disclosed. Methods for manufacturing the aforementioned components are also described.
    Type: Grant
    Filed: March 12, 2002
    Date of Patent: September 19, 2006
    Assignee: Pulse Engineering, Inc.
    Inventors: Glen Cotant, Russell L. Machado
  • Patent number: 7107196
    Abstract: A method and implementing computer system are provided in which an interface device is designed to provide an interface between a remote controller (RC) device for controlling the operation of a vehicle, and a computer system such as a personal computer. The interface device is enabled to receive RC signals from the RC device and convert those RC signals to input signals which are input to a computer system. The interface device builds a translation table for converting the RC or joystick signals to appropriate input signals for the type of vehicle in a particular application. A user is thereby enabled to manipulate an RC device such as a joystick and observe how the user's input joystick movement affects the movement of a simulated controlled vehicle which is displayed on a display screen of the computer system.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: September 12, 2006
    Assignee: International Business Machines Corporation
    Inventor: Kenneth Wayne Waterston
  • Patent number: 7103530
    Abstract: An emulation and debugging system that includes an in-circuit emulator couplable to a microcontroller. The in-circuit emulator is adapted to execute an event thread in lock-step with the microcontroller. Event information generated as a result of executing the event thread is sampled at selected points and the sampled event information is stored in memory. Trace information is also recorded at the selected points. The sampled event information and the recorded trace information are time-stamped. In one embodiment, a display device is coupled to the in-circuit emulator. The display device is used for displaying analog and/or digital waveforms representing the sampled event information and the recorded trace information. Accordingly, an in-circuit emulator system can also function as an oscilloscope and/or as a logic analyzer, allowing a user to view event and trace information, along with other information, that are generated as part of the debugging process.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: September 5, 2006
    Assignee: Cypress Semiconductor Corporation
    Inventors: Manfred Bartz, Craig Nemecek, Matt Pleis
  • Patent number: 7103523
    Abstract: A method and apparatus are provided for implementing multiple configurations of multiple input/output (IO) subsystems in a single simulation model. At least one bus routing switch is included in the single simulation model. Each bus routing switch includes a plurality of ports respectively connected to a plurality of IO busses. Predefined ones of the plurality of IO busses are connected to respective multiple input/output (IO) subsystems in the single simulation model. The bus routing switch is selectively configurable for interconnecting predetermined ones of the plurality of ports. The bus routing switch includes a variable delay latch structure to simulate the effect of long wires. Each bus routing switch includes a plurality of multiplexers. Each of the plurality of multiplexers includes inputs connected to the plurality of ports, an output connected to a respective one of the plurality of ports and has a control input for configuring the bus routing switch.
    Type: Grant
    Filed: March 1, 2001
    Date of Patent: September 5, 2006
    Assignee: International Business Machines Corporation
    Inventors: John Hubert Klaus, Paul Matthew Krolak
  • Patent number: 7103515
    Abstract: The present invention provides, in one embodiment, a method for automatically analyzing an article of manufacture comprising the steps of a) providing a master model and a context model specification; b) creating a context model from the master model and the context model specification; c) translating the context model into an engineering analysis model compatible with an engineering analysis program; d) executing the engineering analysis program to generate a performance estimate form the engineering analysis model; and e) optionally modifying the master model to improve the performance estimate.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: September 5, 2006
    Assignee: General Electric Company
    Inventor: Peter Jurgen Rohl
  • Patent number: 7099818
    Abstract: Communications between a device and a debugging system are effectuated by programming an ICE with a first logic set, which enables the ICE to establish communications with the device and determine a unique identifier thereof. The ICE communicates the device's unique identifier back to a host computer. The host computer matches the unique identifier to a second logic set and a plug-in module. The host computer then programs the ICE with the second logic set and activates the plug-in module. The second logic set allow the ICE and the device to execute program instructions downloaded with the second logic set in lock-step fashion. The plug-in module allows the host computer to interact in the debugging process as necessary. This achieves flexibility, because any ICE may be programmed to communicate with any device.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: August 29, 2006
    Assignee: Cypress Semiconductor Corporation
    Inventors: Craig Nemecek, Steve Roe
  • Patent number: 7099804
    Abstract: Disclosed is a method of horizontally structured automated CAD/CAM manufacturing process, comprising: selecting a blank for machining into an actual part; establishing a coordinate system; creating a master process model comprising: virtual blank corresponding to the blank; a manufacturing feature; virtual machining of the manufacturing feature into the virtual blank, the manufacturing feature exhibiting an associative relationship with the coordinate system; and generating machining instructions to create the actual part by machining the manufacturing feature into the blank; capturing manufacturing process rules in a spread sheet; and the spread sheet exhibiting an associative relationship with the master process model. Also disclosed is a manufactured part created by a method of horizontally structured automated CAD/CAM manufacturing process.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: August 29, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Diane M. Landers, Pravin Khurana, Thomas Beyer, Sailaja S. Devarankonda