Abstract: Apparatuses and methods concerning regulation of load currents are disclosed. As an example, one apparatus includes a first clock generation circuit configured to generate a first clock signal with a frequency spectrum having a first frequency range. A second clock generation circuit is configured to produce a second clock signal by spreading the frequency spectrum of the first clock signal to have a second frequency range that is wider than the first frequency range. The second clock signal has a frequency spectrum extending outside of the frequency range. The apparatus includes a third circuit configured to regulate a voltage at a supply node as a function of the second clock signal. A current regulation circuit is configured to regulate current in a circuit path, from the supply node and passing through a load circuit coupled to the current regulator, as a function of the first clock signal.

Abstract: A light emitting diode (LED) driving device with control based on LED setting resistance is disclosed. The LED driving device is applied to an LED lighting fixture having a setting resistor and is configured to modulate output voltage and output current according to the setting resistor to fit the power requirement of the LED lighting fixture. The LED driving device includes a power conversion module and a driving module. The driving module includes a microprocessor and controlling unit. The microprocessor is electrically connected to the LED lighting fixture for sensing the setting resistor and generates a controlling signal in accordance with the sensed setting resistor to the controlling unit. The controlling unit is electrically connected to the microprocessor and the power conversion module and configured to drive the power conversion module to modulate output current and output voltage according to the controlling signal.

Abstract: A circuit configuration for secure application includes several internal frequency detectors arranged in digital units at critical points of an integrated circuit. The clock detectors are concealed in the digital part of the integrated circuit each as a standard cell (flip-flop unit) in order to prevent any external manipulation and in order to hide its function. The clock detectors are preferably disposed in a clock tree topology, which can be at several levels for distributing the clock signal through the different digital unit tree at critical points. Alarms are generated via a clock detector network if at any level an external clock attack has been monitored.

Abstract: A dual color series-wired LED light string formed of a plurality of sockets, each of which receives an LED housing containing a pair of LEDs connected in anti-parallel configuration. Each LED socket includes a protective resistive component which is electrically connected across each pair of anti-parallel LEDs of the respective LED housing to protect each LED of the pair from reverse voltage breakdown damage in the event of a failure of the other LED in the housing. The protective resistive component also further serves as a shunt to electrically bypass a failed LED to keep the remaining LEDs in the light string fully illuminated.

Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.

Abstract: Aspects of the disclosed techniques relate to techniques for identifying power sensitive scan cells. Signal probability values for signal lines in a circuit design are first computed, wherein the signal lines comprise signal lines associated with scan cells in the circuit design. Toggling probability values are then computed based on the signal probability values, wherein the toggling probability values comprise toggling rate values for the scan cells. Toggling rate reduction values are then computed based on the toggling probability values, wherein the toggling rate reduction values comprise toggling rate reduction values for the scan cells. Finally, scan cells having high toggling rate reduction values are identified.

Abstract: A circuit includes first and second gated buffers, respectively receiving and outputting logic signals, including a delayed signal. A finite state machine receives the delayed signal and a clock signal and assumes first or second machine states. The first gated buffer is conditionally enabled based on a state of the finite state machine, while the second gated buffer is enabled regardless of the state of the finite state machine. A method includes receiving and generating logic signals via first and second gated buffers, including a delayed signal. The method includes receiving the delayed signal and a clock signal in a finite state machine. The method further includes enabling the first gated buffer depending on whether the state machine is in a first or a second machine state, and enabling the second gated buffer when the finite state machine is either in the first or the second machine state.

Abstract: A lighting fixture includes a light source, a housing coupled to the light source, communications circuitry, sensor circuitry, and control circuitry. The housing includes an opening through which light from the light source is provided. The control circuitry includes a memory storing instructions, which, when executed by the control circuitry cause the lighting fixture to transmit sensor data obtained from the sensor circuitry via the communications circuitry for persistent storage of the sensor data. By transmitting sensor data from the lighting fixture for persistent storage thereof, the sensor data may be used to characterize a space in which the lighting fixture is located.

Abstract: Circuits and methods for reducing leakage are provided. In one example, a system includes circuitry to reset a particular logic circuit to a state of reduced leakage. The state of reduced leakage would be known beforehand for the logic circuit. In this example, the logic circuit includes the combinational logic as well as flip flops that output a state to the combinational logic. Some of the flip flops are “SET” flip flops (assuming a 1 output value when a reset input is asserted) and some of the flip flops are “RESET” flip flops (assuming a 0 value when a reset input is asserted). The flip flops are chosen as inputs to the combinational logic so that the particular combination of zeros and ones output to the combinational logic puts the logic circuit in a state that is correlated with a desired level of leakage.

Abstract: A microchip for control of a switch mode power supply (SMPS), with said microchip also having the ability to measure capacitance of an electrode or sense plate structure or structures, and use of a low power, power supply structure to supply said microchip, said power supply structure distinct from the main energy path via said SMPS to a load. The microchip may control said SMPS to transition between an active state and an inactive state, with the measured capacitance used to determine a condition for state transition. In said SMPS inactive state, only the microchip draws power to operate its capacitive sensing circuitry, leading to a significant SMPS standby losses decrease compared to prior art. Further teachings by the present invention include capacitive sensing based data transfer, universal charging platforms for mobile devices, noise immunity enhancements, various lighting embodiments as well as SMPS operation improvements.

Abstract: A light source driving circuit for powering a first light source and a second light source by a DC voltage includes a first current regulator, a second current regulator and a controller. The first current regulator controls a first switch coupled to the first light source based on a first current reference and a first sensing signal. The second current regulator controls a second switch coupled to the second light source based on a second current reference and a second sensing signal. The controller regulates the current through the first light source and the current through the second light source by controlling the first current regulator and the second current regulator. If the DC voltage is within a first range, then the controller turns on the first light source. If the DC voltage is within a second range, then the controller turns on the first light source and the second light source.

Abstract: A programmable low power driver permits an output impedance of the driver to be programmed. Programmability permits the driver output impedance to match an impedance of a transmission line that is connected thereto. The low power driver includes a first driver output and a plurality of driver legs. The programmable low power driver is configured to electrically couple one or more driver legs of the plurality of driver legs to the first driver output to establish an output impedance for the driver.

Abstract: A pulse domain 1 to 2N demultiplexer has a (i) pair of N stage counters each of which is responsive to an incoming pulse train in the pulse domain, one of the counters being responsive to leading edges of the pulses in the incoming pulse train and the other one of the counters being responsive to trailing edges of the pulses in the incoming pulse train and (ii) a control logic responsive to the states through which the pair of counters count, the control logic including 2N gate arrangements, each of the 2N gate arrangements generating a output signal of the pulse domain 1 to 2N demultiplexer.

Abstract: A lighting device includes a casing having an inlet that introduces external air at one side and an outlet that discharges the introduced air at the other side. A fan is located within the casing to flow external air from an inlet direction to an outlet direction. An inlet cover blocks at least an upper area of the inlet to prevent external air from being directly introduced into the inlet. An air flow channel communicates the inlet and the outside, and includes two contracting flow channels having a reducing sectional area in an advancing direction of air. The two expanding flow channels communicate with the contracting flow channels and have an increasing sectional area in an advancing direction of air, so that in a connection portion of the contracting flow channel and the expanding flow channel, the advancing direction of air is changed.

Abstract: In a unit device, a setup unit sets arrangement information, which indicates the position of each unit device in a state where a plurality of unit devices configure a unit device group, according to a sequence that conforms to the arrangement information of adjacent devices after the aforementioned group is configured. A storage unit stores the arrangement information configured by the setup unit. A provision control unit specifies the content of the information providing command, and by collating the content of the specified information providing command with the arrangement information stored in the storage unit, provides either of at least two or more states by means of a provision unit.

Abstract: A tristate gate includes an output port and at least two transistors. Each of the transistors has at least a first and a second gate configured such that a high-impedance value (Z) on the output port is set by controlling the threshold voltage of at least one of the transistors.

Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.

Abstract: An embodiment of the present invention provides a retrofit LED lamp that is operated by a dual mode circuit, enabling maximum compatibility with the ANSI reference ballasts to satisfy UL requirements to replace HID and fluorescent lamps. The LED lamp operates at two different modes, offered by the dual mode PCB circuit. In one of the mode, namely ANSI ballast testing, a low frequency current from the ballast is throttled through a bypass circuit to LEDs, since a field effect transistor of the circuit is in open circuit mode due to insufficient current. During the second mode, namely field ballast operation, a high frequency current is provided by the ballast, which short circuits the FET, causing it to conduct and thus operating the LEDs. Advantageously, the LED lamp offers maximum compatibility with ballasts using such dual mode circuit and consumes less power.

Abstract: A vehicle lighting control system includes wearable glasses configured to recognize pupils of a driver in a vehicle in real time, a head unit configured to receive a size of the pupils of the driver from the wearable glasses to acquire brightness control values of a plurality of lighting devices installed in the vehicle according to a predetermined formula, and a controller configured to adjust brightness of the lighting devices installed in the vehicle according to the brightness control values received from the head unit.

Abstract: A commutation spark gap includes at least one first electrode and one second electrode, both electrically conducting, each including an arc zone placed opposite the arc zone of the other electrode, the electrodes being adapted to be linked to the terminals of a source of potential. The spark gap exhibits a general tubular shape, the first electrode forming a cylindrical body of the spark gap, open at its two ends, and the second electrode, termed the central electrode, cylindrical and co-axial with the first, extending along the axis of the spark gap at least from one end to the other of the cylindrical body.