Abstract: Apparatus, and an associated method, by which to detect a symbol sequence, such as the preamble portion of a frame. Phase calculations are performed, and values of the phase calculations are at least in part determinative of detection of receipt of the symbol sequence. In one implementation, a manner is provided by which to detect reception of the preamble portion of a frame of data broadcast upon a broadcast control channel defined in a HIPERLAN/2 system.

Abstract: An exclusive OR of outputs from a plurality of shift stages of an M-series generator is formed, thereby obtaining an M-series which has a desired delay, which in an example is a three bit delay with respect to the output code from the generator. Similarly, outputs from a plurality of shift stages are combined and an exclusive OR thereof is formed to provide another delayed M-series. An exclusive OR of each output from the simultaneously delayed code generator and an output from another M-series generator is formed, thus simultaneously obtaining a plurality of Gold code series.

Abstract: A PN code generation method of generating a pseudo random noise (PN) code sequence of n cycle (n is an integral number more than 1) having the synchronization relation with a transmission frame of m cycle (m is an integral number more than 1) and is not in, starts generating the PN code sequence keeping the synchronization relation with the transmission frame at start timing of a specific frame in response to identification information and start timing information of the specific frame out of a plurality of transmission frames.

Abstract: A receiver for a unique word sequence or a spreading code sequence includes a memory which is preloaded with all possible phases of the code. The sequence in the received signal is correlated, in parallel, with sums of various ones of the different phases of the code. Thus, the received code is correlated with all possible phases of a replica of its own code. Consequently, one of the sums will exhibit a correlation peak, which indicates that the desired phase of the code is included in that particular sum. The other sums will not exhibit a correlation peak, and are is discarded. The different phases in the one sum which displayed correlation are divided into new sums, each having fewer phases, and the correlation is again performed. Again, those sums exhibiting no correlation are discarded, and the sum exhibiting correlation is divided into sums of fewer codes.

Abstract: An integrated circuit receiver includes a differential input receiver having a plurality of differential input transistors. A variable well voltage supply circuit varies the well voltages of the differential input transistors to change the input transistors threshold voltages to provide hysteresis control by varying well voltages of input transistors in opposite directions. A method for reducing noise for an integrated circuit receiver includes receiving an input signal by a differential input receiver, and changing into opposite directions the input transistors threshold voltages to provide hysteresis control by varying the first and second well voltages associated with each of a first differential input transistor and a second differential input transistor. At least one feedback signal is used from the differential input receiver as input to the variable well voltage supply circuit to vary the first and second well voltages to facilitate hysteresis control of the differential input receiver.

Abstract: A geolocation system for geolocating a mobile transceiver operating in a CDMA communication system is disclosed having improved time of arrival extraction which allows the extracting of time of arrival information of weak CDMA emissions. The improved time of arrival extraction is accomplished by breaking the received CDMA emission into M identical processing stages. Each stage performs despreading/demodulating at over sampled chip offsets from the next processing stage. The P-point fast Fourier transform of the M stages is taken and in effect a two dimensional time versus frequency cross ambiguity function is created. The peak of the function may be interpolated to create an accurate estimate of the time of arrival of the emission from the mobile transceiver, thus improving the accuracy of time of arrival measurements and adjusting for doppler frequency shifts that may otherwise corrupt the measurements when integrating over a long period of time.

Abstract: A frequency detector is configured to provide reliable acquisition by a clock recovery and data regeneration circuit. A preferred frequency detector utilizes the output characteristics of a phase detector to determine a frequency difference between the recovered clock signal and the incoming data signal. The frequency detector then outputs a signal representing the frequency difference to a control device, preferably to a voltage-controlled oscillator (VCO). Upon receiving the frequency difference signal, the control device, preferably operating within a controlled-feedback loop, will begin to adjust the underlying clock frequency to approximate the incoming data frequency.

Abstract: An offset estimation and bit timing system and method configured to detect a DC offset in a received signal is disclosed herein. The inventive system includes a first circuit for receiving and correlating a transmitted signal and generating a trigger signal in response thereto. A second circuit accumulates the received signal and provides a second signal on receipt of the trigger signal. The second signal is then converted to an offset error signal. The error signal is converted to analog and used as a reference input for an A/D converter. As an alternative, the error signal may be used to adjust the signal output by an intermediate frequency downconversion stage.

Abstract: A receiver for direct sequence spread spectrum code division multiple access signals (DS-CDMA) particularly for GPS signals includes a plurality of correlators. Each correlator includes variable level threshold circuits (29, 30) which follow integrate and dump registers (27, 28). The threshold level is set using the correlation noise level and predicted signal strength.

Abstract: A highly modular PACS-based system that combines the advantages of Optical Frequency Division Multiplexing (OFDM) and Personal Access Communication System (PACS) with Time Division Multiple Access (TDMA) technology. The system is arranged to support high-speed (higher than the 32 kbps of PACS) wireless access services to fixed and mobile users. For example, nominal user data rates of 32-to-356 kbps are attainable, and ever the higher speed of 768 kbps is possible for short ranges.

Abstract: A transmitting side periodically inserts a known signal consisting of successive NP symbols into an information signal consisting of (NF−NP) symbols and transmits the NF symbol signal. The receiving side receives the NF symbol signal, and automatically controls a frequency by estimating a frequency deviation from the incoming signal. More specifically, the receiving side outputs I and Q-channel analog baseband signals from the received incoming signal as well as from a sinusoidal signal outputted from an oscillator, and converts the analog baseband signals to the digital baseband signals. Then a phase difference for one symbol cycle is estimated from the digital baseband signals, integration processing is executed by iterative addition of the estimated values, and the frequency deviation is eliminated from the digital baseband signals using a result of the processing for integration.

Abstract: A method (100) and apparatus (400) for encoding and decoding data in a signal using notch depth modulation. The method (100) of data to be encoded in the signal. The method then notch filters (125) the signal according to the frequency notch representation of the data. The apparatus (400) for encoding data comprises an digitizer (405) to digitize the signal. A code former (420) provides the data to be encoded in the signal. A notch filter (430) notch filters the signal according to the data. Decoding the data converts the signal into a frequency domain representation (520) and determines the notch spectral content (525) of the signal at selected notch frequencies. The method (500) establishes notch thresholds (534) at each of the selected notch frequencies, then decodes the data (540) from the signal by comparing the notch spectral content to the notch thresholds.

Abstract: A method of receiving data signals having identical contents and different frequencies. The frequency position of the data signals is analyzed by means of an FFT, and the signals are down-converted to the same intermediate frequency. The frequencies are selected such that the partial waves are constructively superpositioned, thereby improving the signal-noise ratio in the sum.

Abstract: A matched filter having a set of registers to successively store a digital voltage. The matched filter includes a cumulative shift register, a number of exclusive-or circuits, and an analog adder. The cumulative shift register has a number of stages in which each stage has one bit corresponding to the shift register. The exclusive-or circuits each perform an exclusive-or function on each bit of the digital data and the one bit coefficient while the analog adder sums outputs from the exclusive-or circuits.

Abstract: A spread spectrum communication system includes a plurality of cells which share common frequencies. Each base station managing each cell includes transmitters for transmitting a reception load state of the base station to other base stations managing other cells. Receivers for receiving reception load states of the other base stations and transmitters for transmitting a signal having control information interpolated therein to each mobile station within the cell under management are included in the system. The control information is used for controlling a transmission station of each mobile station.

Abstract: The present invention is a channel estimator based on the values of received data and on a priori probabilities only of received symbols. The channel estimator includes a symbol probability generator, a noise variance estimator and a channel tap estimator. The symbol probability generator generates a priori probabilities only of transmitted symbols found in the received signal(s). The noise variance estimator estimates at least one noise variance corrupting the received signal(s). The channel tap estimator generates channel estimates from the received signal(s), the a priori probabilities and the noise variance(s).

Abstract: A signal equalization system provides a block-mode equalization system for digital equalization in computer and networking systems in which a “1” bit pulse is followed by a significant negative bit and less significant negative bit pulses as a multiple groups with a lower bit rate. The magnitude of the grouped bit pulses, or blocks of equalization bit pulses, can be the average value of the individual bits to produce a clean output waveform. Since the block compensates for the lower frequency response of the channel, its effectiveness is not sensitive to the exact location of the pulses. This makes it possible to align the blocks in wide pulses having decreasing magnitudes and increasing durations. This further means that when data multiplexing is involved in driver circuitry for the signal transmitter, the block can be generated from a lower frequency clocked domain before the multiplexing without burdening the high frequency side of the driver circuitry.

Abstract: An adapter and a method for adapting a programmable digital maximum likelihood detector to a variable channel output and a calibration system for calibrating a programmable digital maximum likelihood detector from unknown data in a known code at a variable channel output, the maximum likelihood detector having a number of maximum likelihood states. A detector detects a digital sample of the recorded analog signals as corresponding to one of the maximum likelihood states. An accumulator partially accumulates the detected digital sample with prior detected digital samples corresponding to the one of the maximum likelihood states. Logic coupled to the accumulator employs the accumulated digital samples for the corresponding maximum likelihood state to determine at least one numerical metric coefficient matching the digital samples to the one of the maximum likelihood states, and updates or sets the numerical metric coefficient.

Abstract: A phase lock loop is provided for recovering timing information from a received data signal in a 100Base-TX receiver. The phase lock loop includes a phase encoder (803) for generating a reference phase error. An output phase value on a bus (809) is subtracted from the reference phase value on line (805) with a subtraction block (813) to generate a phase error. This phase error is averaged and decimated over a predetermined number of potential symbol transitions in the received signal. The output phase error is provided from a block (815) on a line (817) to a loop filter. This output is provided only once for each decimation operation such that the loop filter can operate at a lower clock rate. The phase error output is then utilized to select one of multiple clocks that correspond to the phase error, these being incremental phase clocks referenced to a master clock. This utilizes a clock multiplexer (1427) to select one of the multiple clock inputs which are delayed in phase off of the master clock.

Abstract: An initialization procedure for a digital modem system treats the presence of ADPCM as if it were a digital impairment such that the modem system can utilize effective compensation techniques to address the ADPCM. The modem system initially determines whether the current communication channel is a fully digital channel. Next, the modem system determines whether the channel includes any ADPCM elements. If ADPCM is detected, then a digital impairment learning routine is performed to obtain the ADPCM compression characteristics and data rate. The digital impairment learning routine may use a single probing sequence to obtain the ADPCM characteristics while identifying any concurrent digital impairments such as RBS, digital pads, and encoding law conversions. Once the digital channel is characterized, the modem system may condition its transmitters and receivers in an appropriate manner to obtain an increased data rate.