Patents Examined by Edmund Kwong
  • Patent number: 9672056
    Abstract: Systems and methods for reducing redundant network transmissions in virtual machine live migration.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: June 6, 2017
    Assignee: Red Hat Israel, Ltd.
    Inventor: Michael Tsirkin
  • Patent number: 9658797
    Abstract: A system, method, and computer program product for storage provisioning in a data storage environment comprising protecting, through an orchestration API, a source volume at a source site by setting the source volume to be replicated to a target volume at a target site through the use of a replication appliance; wherein the API is enabled to create network zones between the source site and the target site for replication from the source site to the target site and wherein the network zone is configured to include the replication appliance; wherein the API is enabled to mask storage devices used to store data on the source volume and the target volume.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: May 23, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: William J Elliott, IV, Anoop G. Ninan, Evgeny Roytman, Thomas L. Watson, Ameer Jabbar
  • Patent number: 9653141
    Abstract: A method of operating a volatile memory device includes storing address information of weak cell rows. According to some examples, after writing to a weak cell row, a refresh operation is performed on the weak cell row within a predetermined time. According to some examples, the writing operation to a weak cell row may be performed with a longer write recovery time than a write recovery time to normal cell rows.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: May 16, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Yun Kim, Jong-Pil Son, Su-A Kim, Chul-Woo Park, Hong-Sun Hwang
  • Patent number: 9645739
    Abstract: One embodiment provides a computing device. The computing device includes a processor; a chipset; a memory; and indirection logic. The indirection logic is to receive a host logical block address (LBA) associated with a first sector of data, map the host LBA from a host address space to a first device LBA in a device address space, the device address space related to a non-volatile memory (NVM) storage device physical memory address space, and provide the first sector of data and the first device LBA to the NVM storage device.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: May 9, 2017
    Assignee: INTEL CORPORATION
    Inventors: Bryan E. Veal, Dan J. Williams, Annie Foong
  • Patent number: 9626307
    Abstract: A mobile device including: a storage device; a system-on-chip (SOC) including a central processing unit (CPU) and a memory interface configured to access the storage device in response to a request of the CPU; and a working memory including an input/output (I/O) scheduler and a device driver, the I/O scheduler configured to detect real time processing requests and store the real time processing requests in a sync queue, and detect non-real time processing requests and store the non-real time processing requests in an async queue, the device driver configured to adjust the performance of the mobile device based on the number of requests in the sync queue.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: April 18, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Ho-Sung Kim
  • Patent number: 9613214
    Abstract: Several embodiments of systems incorporating nonvolatile memory devices are disclosed herein. In one embodiment, a system can include a central processor (CPU) and a nonvolatile memory device operably coupled to the CPU. The nonvolatile memory device can include a memory that stores pre-measurement instructions that are executable by the nonvolatile memory upon startup, but not executable by the CPU upon startup. In operation, the pre-measurement instructions direct the nonvolatile memory to take a measurement of at least a portion of its contents and to cryptographically sign the measurement to indicate that the measurement was taken by the nonvolatile memory device. In one embodiment, the CPU can use the measurement to determine whether the nonvolatile memory device is trustworthy.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: April 4, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Lance W. Dover
  • Patent number: 9601207
    Abstract: A semiconductor memory device is operated by, inter alia, performing least significant bit programs for pages in a first page group, performing least significant bit programs for pages in a second page group, and performing most significant bit programs for the pages in the first page group. The distance between the second page group and the common source line is greater than that between the first page group and the common source line.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: March 21, 2017
    Assignee: SK HYNIX INC.
    Inventors: Yong Dae Park, Eun Seok Choi, Jung Ryul Ahn, Se Hoon Kim, In Geun Lim, Jung Seok Oh
  • Patent number: 9594506
    Abstract: A method for transferring messages from a producer element to a consumer element uses a memory shared between the producer element and the consumer element, and a hardware queue including several registers designed to contain addresses of the shared memory. The method includes the steps of storing each message for the consumer element in the shared memory in the form of a node of a linked list, including a pointer to a next node in the list, the pointer being initially void, writing successively the address of each node in a free slot of the queue, whereby the node identified by each slot of the queue is the first node of a linked list assigned to the slot, and when the queue is full, writing the address of the current node in memory, in the pointer of the last node of the linked list assigned to the last slot of the queue, whereby the current node is placed at the end of the linked list assigned to the last slot of the queue.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: March 14, 2017
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Gilles Pelissier, Jean-Philippe Cousin, Badr Bentaybi
  • Patent number: 9589641
    Abstract: A semiconductor memory device includes a first page buffer block and a second page buffer block corresponding to a first memory bank and a second memory bank, respectively, an input/output control circuit suitable for transferring input data to data lines, a first column decoder and a second column decoder suitable for latching the input data transferred through the data lines to the first page buffer block and the second page buffer block, respectively, based on a column address transferred through address lines that are shared by the first and second column decoders, and a control signal generation circuit suitable for generating a plurality of page buffer selection signals to control the first and second column decoders to selectively perform data latch operations on the first and second page buffer blocks.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: March 7, 2017
    Assignee: SK Hynix Inc.
    Inventor: Min Su Kim
  • Patent number: 9582416
    Abstract: A data erasing method for a rewritable non-volatile memory module is provided. The method includes receiving a predetermined command for performing on a first logical sub-unit from a host system; marking a first physical programming unit mapped to the first logical sub-unit as being in an invalid data status and recording a mark for a first physical erasing unit that the first physical programming unit belongs to, in response to the predetermined command. The method further includes selecting the first physical erasing unit according to the mark, copying valid data in the first physical erasing unit to a second physical erasing unit gotten from a spare area of the rewritable non-volatile memory module and erasing data stored in the first physical erasing unit.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: February 28, 2017
    Assignee: PHISON ELECTRONICS CORP.
    Inventor: Chih-Kang Yeh
  • Patent number: 9582206
    Abstract: Methods and systems for executing a copy-offload operation are provided. The method includes determining if content of a source data container can be changed, after the source data container is opened for a copy-offload operation to copy the source data container from a source location to a destination location. The method further includes using a direct copy mode for generating a token for the copy-offload operation, without taking a point in time image of the source data container, when the content cannot be changed based on a mode in which the source data container is opened; and selecting a point in time copy mode by taking the point in time image of the source data container for generating the token, when the content can be changed.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: February 28, 2017
    Assignee: NETAPP, INC.
    Inventors: Saji Kumar Vijayakumari Rajendran Nair, Mudit Aggarwal
  • Patent number: 9569128
    Abstract: A storage device includes a nonvolatile memory unit, a volatile memory unit, a power supply control unit configured to control power supply to the nonvolatile memory unit and the volatile memory unit, and a control unit configured to control the power supply unit to cut off the power supply to the nonvolatile memory unit and the volatile memory unit during a first operation, and control the power supply unit to cut off the power supply to the nonvolatile memory unit and to maintain the power supply to the volatile memory unit during a second operation that is different from the first operation.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: February 14, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Taro Iketaki
  • Patent number: 9563551
    Abstract: A data storage device is provided. The data storage device, coupled to a host, includes: a flash memory; and a controller, configured to control accessing of the flash memory; wherein when the host performs random data accessing to the flash memory, the controller retrieves address information of a corresponding block and a corresponding page in the flash memory associated with first data to be read based on a global mapping table, and pre-fetches the corresponding page from the flash memory based on the address information; wherein when the controller obtains the address information, the controller further determines whether the first data is located in a current buffer block based on a local mapping table; wherein when the first data is located in the current buffer block, the controller further cancels the pre-fetched corresponding page, and reads the first data from the current buffer block.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: February 7, 2017
    Assignee: SILICON MOTION, INC.
    Inventor: Chang-Kai Cheng
  • Patent number: 9558194
    Abstract: A computer implemented method, computer program product, and system for providing, via a storage provisioning engine, a scalable objects store enabled to store objects across multiple heterogeneous file arrays; wherein file arrays are enabled to be actively added to the object store without pausing the file arrays; and wherein data representing the objects enabled to be balanced across the heterogeneous file arrays based.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: January 31, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Shashwat Srivastav, Vishrut Shah, Sriram Sankaran, Jun Luo, Fredrick A. Crable, Chen Wang, Huapeng Yuan, Subba R. Gaddamadugu, David A. Gillam, Daquan Zuo, Wei Yin, Brian D. Burck
  • Patent number: 9552159
    Abstract: According to one configuration, a memory system includes a configuration manager and multiple memory devices. The configuration manager includes status detection logic, retrieval logic, and configuration management logic. The status detection logic receives notification of a failed attempt by a first memory device to be initialized with custom configuration settings stored in the first memory device. In response to the notification, the retrieval logic retrieves a backup copy of configuration settings information from a second memory device in the memory system. The configuration management logic utilizes the backup copy of the configuration settings information retrieved from the second memory device to initialize the first memory device.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: January 24, 2017
    Assignee: Intel Corporation
    Inventors: Ning Wu, Robert E. Frickey, Hanmant P. Belgal, Xin Guo
  • Patent number: 9547441
    Abstract: Exposing a geometry of a storage device, including: sending, by the storage device, information describing the layout of memory in the storage device; receiving, by the storage device, a write request, the write request associated with an amount of data sized in dependence upon the layout of memory in the storage device; and writing, by the storage device, the data to a memory unit, the data written to a location within the memory unit in dependence upon the layout of memory in the storage device.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: January 17, 2017
    Assignee: Pure Storage, Inc.
    Inventors: John Colgrove, Peter E. Kirkpatrick
  • Patent number: 9535807
    Abstract: A method for recovering from uncorrected memory errors may include receiving, at an operating system, a correctable error (CE) associated with a first memory page. The correctable error is marked in a page table entry describing the first memory page. The first memory page is then migrated, by the operating system, to a second memory page based on the received correctable error.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: January 3, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventor: Aravinda Prasad
  • Patent number: 9535629
    Abstract: A method, computer program product and system enabling provisioning of a storage volume across network resources through the storage provisioning interface, wherein the storage provisioning interface enables provisioning of network resources to enable presentation of a provisioned storage volume, wherein the provisioned storage volume is enabled to be provisioned across a plurality of storage resources across the network resources, and wherein the provisioned storage volume is enabled to be a redundant distributed volume.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: January 3, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Salvatore DeSimone, Suresh K Biddappa, Vladislav Dranov, Michael G. Hegerich, Patrick J. Hunt, Anurag Jain, Adam C. LaPlante, Stephen A. Mendes, Anoop G. Ninan, Thomas L. Watson
  • Patent number: 9529534
    Abstract: Exemplary methods, apparatuses, and systems determine a miss-rate at various amounts of memory allocation for each of a plurality of workloads running within a computer. A value representing an estimated change in miss-rate for each of the workloads based upon an increase in a current allocation of memory to the workload is determined. The workload with a value representing a greatest improvement in hit rate is selected. Additional memory is allocated to the selected workload.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: December 27, 2016
    Assignee: VMware, Inc.
    Inventors: Sachin Manpathak, Mustafa Uysal, Puneet Zaroo, Luis Useche
  • Patent number: 9495287
    Abstract: Embodiments relate to solid state memory device including a storage array having a plurality of physical storage devices and the storage array includes a plurality of partitions. The solid state memory device also includes a controller comprising a plurality of mapping tables, wherein each of the plurality of mapping tables corresponds to one of the plurality of partitions. Each of the plurality of mapping tables is configured to store a physical location and a logical location of data stored in its corresponding partition.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: November 15, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas J. Griffin, Dustin J. VanStee