Abstract: A series of adders (AD.sub.i) with inputs for binary number bits of the same significance, which output intermediate sum and carry words that are combined to form sum words, are provided for the bit-parallel addition of binary numbers in two's complement with carry-save overflow correction. For the correction of overflow errors, the carry bit of the adder (AD.sub.n-2) having the second highest significance is replaced by the carry bit of the most significant adder (AD.sub.n-1) and, in case the carry bits of the two most significant adders (AD.sub.n-1, AD.sub.n-2) are unequal, the intermediate sum bit of the most significant adder (AD.sub.n-1) is replaced by the carry bit thereof. The element AD.sub.kn-1 has the same number of transistors as the other adders AD.sub.0 . . . AD.sub.n-2.

Abstract: A parallel arithmetic-logic unit (PALU) controlled by a microinstruction sequencer and capable of executing conditional operations in a single pass is disclosed. The PALU generally comprises first and second registers for storing data, a comparator for continually comparing the values in the registers, and an arithmetic-logic core connected to the registers for performing arithmetic, logical and data move operations on the data in the registers. The comparator is preferably an unsigned magnitude comparator which outputs flags indicative of the relative status of the values in the registers. The flags are read by a microinstruction sequencer which then uses the flag information to determine what operation the arithmetic-logic core is to conduct. Preferably, a shifter is also provided between one of the registers and the arithmetic-logic core.

Abstract: A fast pipeline adder comprising a plurality of registered adder rows. In one embodiment, additions in the pipeline are realized in reclocked half adders. In another embodiment, modified adders are employed which accept two carry inputs and develop two carry outputs. The resulting number of individual cells is reduced to approximately half of those in the prior embodiment. In still another embodiment, switch means are included in each cell to delete the reclocking and in still another embodiment, the adders in the diagonal of the pipeline adder are provided with additional inputs to permit use of the pipeline adder in recursive addition applications. In still another embodiment, the cells are permitted to output the inverse of the intended signal, reducing thereby the physical realization of the cells and increasing the speed of the cells.

Abstract: The surface parts of an image which is stored in the form of a bit-representation in a raster image memory may be filled with a surface pattern using the following steps: generating a bit-representation of the surface pattern defined uniformly over the entire image surface; generating a mask function, which gives a specific logic value to those raster points which are situated within the boundaries of the surface parts; generating a filling pattern by performing a logic operation on the bit-representation of the surface pattern and the mask function; and transferring the filling pattern to the raster image memory.

Abstract: The random number generating capability of a computer is used as a basis for producing sets of alphanumeric configurations for a plurality of bingo cards, and the comparator capability of the computer is utilized to eliminate duplication from among the plurality. A computer-controlled, high-speed graphics printer is used to print, on sheets of paper, bingo cards from among the plurality.

Abstract: A secure system includes a secure central processor unit, an input/output emulator, a number of commodity controller boards and a number of commodity memory boards. Apparatus in the secure CPU and firmware in the I/O emulator maintain the security of the overall system.

Abstract: In a digital encoder, truncation is controlled by the fullness of the output rate-smoothing buffer. A signal compression system is shown for processing a stream of fixed length digital sample signals, such as audio signals, which system includes a linear digital compression filter for compression filtering the sample signal stream and generating a stream of compression-filtered signals. The compression-filtered stream is encoded by an encoder which implements a variable word length truncated code. The encoder output is supplied to a buffer for transmission to a communication channel. The encoder is controllably operable in a normal mode and in an out of range (OOR) mode. In the OOR operating mode an OOR code word together with the compression filtered signal is sent to the buffer. Buffer underflow is controlled by operation in the OOR mode when the buffer is empty or near empty.

Abstract: Apparatus and method for synthesizing word baseforms for words not spoken during a training session, wherein each synthesized baseform represents a series of models from a first set of models, which include: (a) uttering speech during a training session and representing the uttered speech as a sequence of models from a second set of models; (b) for each of at least some of the second set models spoken in a given phonetic model context during the training session, storing a respective string of first set models; and (c) constructing a word baseform of first set models for a word not spoken during the training session, including the step of representing each piece of a word that corresponds to a second set model in a given context by the stored respective string, if any, corresponding thereto.

Abstract: Boolean AND or OR operations that are functions of two variables can be performed without knowledge of one of the variables. In a computer graphics system utilizing a frame-buffer memory to refresh a display, a pixel processor using this technique can perform SET and CLEAR functions on the data stored in the memory in which only memory write cycles are required.

Abstract: A device for high resolution measurement of frequency of a sinusoidal signal generated by a signal generator using an analog to digital converter to digitize the signal at an adjustable sampling frequency for a period defined by a given zero transition. The frequency is proportional to the number of samples taken within the measured period adjusted by a mathematical relationship between the absolute values of the sampled signal before and after the zero transition.

Abstract: An interactive data processing implemented method and apparatus for composing and editing a document in which a user is afforded great flexibility in defining the document geometry and in changing the data presentation characteristics associated with non-continguous portions of the document. According to the present invention, each of the distinct line formats in the document is assigned an abstract format name (i.e., a Named Format) and each line in the document is associated with a distinct format. A Names Format is associated with each fragment of the text in the document. Likewise, an abstract means, referred to as a Named Font, is associated with a wide range of specificable data presentation characteristics which operate over a range of the document defined by the user. The same Named Format and Names Font is used to simultaneously specify different data presentation characteristics for the output device of the system.

Abstract: In a multipulse-excitation system, the number of pulses versus the number of quantization levels are adjusted as a function of speech signal power, for example, voiced sound is high power and needs only a few pulses, but large number of quantization levels, versus the reverse for unvoiced sound.

Abstract: The identity of a desired video disk is compared to the identity of a video disk in use in a video disk player. If the desired video disk is not the same as the video disk in the player, instructions are given to change the video disk, and a comparison is again made.

Abstract: The invention disclosed provides an intelligent input/output system for a programmable controller and includes a plurality of input/output (I/O) modules, each of which may be located in proximity to the process being controlled. Each module is interconnected, via a communications link, to a central processor unit (CPU) through an I/O controller. Each module is made up of a plurality of input/output circuits and each may be selectively operated as an input circuit or as an output circuit. The selection is preferably under control of the CPU. Each I/O module includes an operations control unit for controlling each I/O circuit and for providing an exchange of diagnostic and control signals between each I/O circuit and the I/O controller and CPU. Communications between the operations control unit and each I/O circuit is preferably carried out via a pair of conductors, one conductor of which conveys a set of recurring control signals (e.g.

Abstract: Disclosed is a method and system for creating a visual display of data from an input data set in which the data are not fixed into display-acceptable format until the data are stored in a local memory of the visual display. At least one of a plurality of sources of resource information is initially selected as required by the input data set. Control signals corresponding to the sources of resource information are thereafter embedded into the input data set to form an output data set. Subsequently, the selected sources of resource information and the output data set are applied to the local memory. They are concurrently taken from this local memory to produce a visual display. Fixation of the data into display acceptable format is thereby postponed until just prior to actual display to thereby provide a substantial increase in system flexibility.

Abstract: A digital computing system includes at least a first and a second bus with at least a first master connected to the first bus and a second master connected to the second bus. The first master is capable of requesting the second bus through the first bus and the second master is capable of requesting the first bus through the second bus. Central conversion means receives both requests and has circuitry for generating a response signal to the first bus when both requests come simultaneously. The first master receives the response signal and continues the cycle, but without continuing the request for the second bus. The cycle is completed as though the request had been completed.

Abstract: In a speech recognition system for effecting substantially linear matching, a start point of an input speech pattern is detected to start counting the frames of the input speech pattern for updating a speech frame number. Each time the speech frame number is updated, a plurality of frame numbers of reference templates are generated in substantially a linear relationship to the frame number, thus providing a plurality of matching paths between each of the reference templates and the input speech pattern. The distance between the input pattern data and the reference template data between the corresponding frames specified by each matching path is calculated each time the speech frame number is updated. An accumulated value of the distances along a matching path from the start point of the input speech until a desired speech frame is regarded as a dissimilarity, and the dissimilarity corresponding to each matching path in each reference template is calculated each time the speech frame is updated.

Abstract: In an oil well instrumentation system, the downhole sensor system is controlled by a computer which is powered-on only during sampling movement. An independent circuit, continuously powered, detects significant sensor rate-of-change values whereby the computer-sampling equipment is powered-on. A self-contained memory gauge includes either semiconductor or magnetic core memory for retaining downhole information related to sampled parameters, such as borehole temperature and pressure. A microprocessor-based computer manages the power utilization by independently and selectably energizing and deenergizing different sections of the gauge. The magnetic core memory is tested for operability, and the addressing of the magnetic core memory is adjusted in accordance with any inoperable memory locations.

Abstract: A multipulse excitation signal estimate is followed by chronological adjustment.

Abstract: Pre-recorded speech is played back at a different rate, without pitch change. Adjacent signal segments are combined with best match processing. Method and apparatus process time domain speech signals containing speech information, the rate of reproduction of which is to be varied without changing pitch, wherein the input signal is processed by capturing input time domain speech samples in frames wherein the number of samples per frame is a function of a desired speech change factor, forming blocks from the frames, additively cross correlating input blocks with prior-processed or output blocks, preferably by means of an Average Magnitude Difference Function, to obtain a time relation of best match for the rate of reproduction, adding consecutive input and output blocks at the point of maximum correlation, and applying a window function between the overlapping portions of the output block and the input block to obtain a new output block. The method does not require multiplication or division.