Patents Examined by Emmanuel Todd Voeltz
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Patent number: 5815712Abstract: A system for providing a user or agent control over functions defined by an object in a target application. The object is a new type of object called a controllable object, which publishes its functions and for use by a control application. When the target application execution is commenced, it generates predefined controllable objects, and then execution of the control application is commenced. The control application obtains a handle on the controllable object, and then is able to set any of a number of predefined values in the controllable object, such as individual variables or parameters, ranges of values, a list of choices from which the user can select, and others. In this way, the user can manipulate, test and optimize the target application even during its execution, by virtue of the pre-programmed controllable object functions.Type: GrantFiled: July 18, 1997Date of Patent: September 29, 1998Assignee: Sun Microsystems, Inc.Inventors: David M. Bristor, Brian T. Lewis, Graham Hamilton
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Patent number: 5805893Abstract: A converter and method (10) for converting an assembly language computer program (12) into a high-level language computer program (20, 22) includes the steps of reading and storing the assembler listing (18) into an array in memory (102), logically tracing said assembler listing (112), determining which lines are reachable logically, and marking reachable and unreachable lines accordingly, and further determining an instruction type for each reachable line and identifying each line by type accordingly (114). A data table having a hierarchy of data elements in said assembler listing is built (118), a data division from said data table is generated (134), and an hierarchy of sections of code caused by perform instructions in said assembler listing are identified and labeled (122, 124). The assembler listing is converted into a source program in said high-level language and unloaded as the high-level language source program from memory.Type: GrantFiled: March 1, 1996Date of Patent: September 8, 1998Assignee: Electronic Data Systems CorporationInventors: Robert C. Sproul, John A. Wedel
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Patent number: 5790414Abstract: An automatic routing method and an automatic routing apparatus enable an optimum automatic routing under severe design conditions due to high-density mounting of an object of a wiring design such as an LSI, a multichip module, a printed wiring board, etc. The automatic routing apparatus has an area input unit for inputting area information for setting a routing controlled area in which an automatic routing is performed under specific routing control conditions within a wiring area of an object of the wiring design, a condition input unit for inputting condition information for designating the routing control conditions in the routing controlled area set according to the area information inputted from the area input unit, and an automatic routing unit for automatically routing under the specific routing control conditions designated according to the condition information inputted from the condition input unit within the routing controlled area.Type: GrantFiled: November 10, 1997Date of Patent: August 4, 1998Assignee: Fujitsu LimitedInventors: Mitsunobu Okano, Hiroshi Miura, Toshiyasu Sakata, Hiroyuki Orihara
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Patent number: 5787006Abstract: An apparatus and method for managing data obtained during the Design Rule Check (DRC) and Layout versus Schematic (LVS) verification procedures executed during the design of an integrated circuit. The apparatus is a data processing system which includes a database containing information regarding the schematics and layouts of the cells of an integrated circuit. The system accesses the database upon the completion of a DRC or LVS operation and queries the user as to whether the cell should be marked as successfully passing the appropriate verification procedure. A user is also able to access a report generating module to inspect the verification status of a cell in the IC design and generate a report showing the status of the verification procedures for each cell, organized according to one of several criteria.Type: GrantFiled: April 30, 1996Date of Patent: July 28, 1998Assignee: Micron Technology, Inc.Inventors: Christophe J. Chevallier, Yarema A. Hryciw
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Patent number: 5055991Abstract: A capacitor connected directly across the terminals of the primary inductance of a transformer of a switched mode power supply and a separately wound inductor connected between the primary inductance and the switching power transistor which form a lossless snubber circuit. The snubber circuit is more efficient since resistors are not used to dissipate the energy as unwanted heat. The capacitor increases the transistor turn off voltage rise time, thereby reducing radiated emissions. The inductor reduces emissions appreciably by absorbing the ringing that would otherwise occur after the transistor is turned fully off and increases the transistor turn on time.Type: GrantFiled: October 12, 1990Date of Patent: October 8, 1991Assignee: Compaq Computer CorporationInventors: Barry N. Carroll, Jean H. Ho
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Patent number: 5050058Abstract: At least two three-phase transformer arrangements include a plurality of primary windings connected in a wye configuration and at least two converter arrangements, each converter arrangement comprising a plurality of secondary windings connected in a double-wye configuration. A separate rectifier is connected in series with each secondary winding of each converter arrangement.Type: GrantFiled: August 14, 1990Date of Patent: September 17, 1991Assignee: La Corporation de l'Ecole PolytechniqueInventors: Georges-Emile April, Guy Olivier