Patents Examined by Eric C. Wai
  • Patent number: 9319284
    Abstract: A delay in a configuration changing operation of a computer system including a manual procedure and an automatic procedure is detected. Based on actions of a setup tool or a configuration tool operated on IT resources, an event which occurs corresponding to the start and the end of a manual procedure is detected and the actual time of the manual procedure is calculated from the detection time points. Next, a delay rate is calculated from a scheduled time and the actual time of the manual procedure, and an end time point of an incomplete operation procedure is estimated from an estimated time required for the manual procedure with the calculated delay rate taken into account and from a time required for the automatic procedure to determine whether the scheduled operation will be finished within a period.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: April 19, 2016
    Assignee: HITACHI, LTD.
    Inventors: Daisuke Iizuka, Takuya Oda
  • Patent number: 9311144
    Abstract: A data processing method comprising the computer-implemented steps of using a process management computer, receiving an electronic workflow document in response to execution of editing instructions at a user terminal that is coupled by network to the process management computer, wherein the electronic workflow document defines a workflow using a plurality of tags and statements that specify steps in the workflow, wherein each of the steps is either an atomic type step or a non-atomic type step, wherein at least a first step that is atomic comprises a plurality of instructions and is programmed to signal, to a second and successive non-atomic step, normal completion of execution of the first step; wherein at least a second step that is non-atomic is programmed to call a completion callback in response to the signal; using the process management computer, parsing the electronic workflow document to form an in-memory representation of the workflow in computer memory; using the process management computer and usi
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: April 12, 2016
    Assignee: XACTLY CORPORATION
    Inventor: Vasudev Krishnamoorthy
  • Patent number: 9298514
    Abstract: A disclosed system receives a request for resources, generates a credential map for each credential associated with the request, the credential map including a first type of resource mapping and a second type of resource mapping. The system generates a resource availability map, generates a first composite intersecting map that intersects the resource availability map with a first type of resource mapping of all the generated credential maps and generates a second composite intersecting map that intersects the resource availability map and a second type of resource mapping of all the generated credential maps. With the first and second composite intersecting maps, the system can allocate resources within the compute environment for the request based on at least one of the first composite intersecting map and the second composite intersecting map.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: March 29, 2016
    Assignee: Adaptive Computing Enterprises, Inc.
    Inventor: David Brian Jackson
  • Patent number: 9286114
    Abstract: A system and method for launching data parallel and task parallel application threads. In one embodiment, the system includes: (1) a global thread launcher operable to retrieve a launch request from a queue and track buffer resources associated with the launch request and allocate output buffers therefor and (2) a local thread launcher associated with a streaming multiprocessor and operable to receive the launch request from the global thread launcher, set a program counter and resource pointers of pipelines of the streaming multiprocessor and receive reports from pipelines thereof as threads complete execution.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: March 15, 2016
    Assignee: NVIDIA CORPORATION
    Inventor: Albert Meixner
  • Patent number: 9286082
    Abstract: A method and apparatus for generating and communicating encoded images. In one embodiment, the apparatus comprises a graphics processor for rendering, for each display of a plurality of displays, a plurality of images from a plurality of drawing command sets, wherein each drawing command set is generated by a separate VM of a plurality of VMs in response to HID events received from a network location associated with a corresponding display; an image encoder for generating an encoding of each image of the plurality of images, each encoding comprising indications of changed and unchanged portions of a corresponding image; and a scheduler, coupled to the image encoder by a computer expansion bus, for scheduling generation of the encoding based on completion of (i) a rendering of an associated image from the plurality of images and (ii) a transmitting, via the IP network, of an encoding of a previously associated image.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: March 15, 2016
    Assignee: Teradici Corporation
    Inventor: David Victor Hobbs
  • Patent number: 9268586
    Abstract: Several different embodiments of a flexible virtual machine management system are described. The virtual machine management system is used to instantiate, wake, move, sleep, and destroy individual operating environments in a cloud or cluster. In various embodiments, the virtual machine management system uses single messages to perform complex operations, allowing for flexible and scalable use of virtual resources in a cluster while still reducing energy consumption to the minimum possible level. In one preferred embodiment, Wake-on-LAN packets are used as the messages.
    Type: Grant
    Filed: May 9, 2012
    Date of Patent: February 23, 2016
    Assignee: Rackspace US, Inc.
    Inventors: Paul Voccio, Antony Joel Messerli, Jason L. Mick, Alexander Walsh
  • Patent number: 9251078
    Abstract: Methods, parallel computers, and computer program products for acquiring remote shared variable directory (SVD) information in a parallel computer are provided. Embodiments include a runtime optimizer determining that a first thread of a first task requires shared resource data stored in a memory partition corresponding to a second thread of a second task. Embodiments also include the runtime optimizer requesting from the second thread, in response to determining that the first thread of the first task requires the shared resource data, SVD information associated with the shared resource data. Embodiments also include the runtime optimizer receiving from the second thread, the SVD information associated with the shared resource data.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, James E. Carey, Philip J. Sanders, Brian E. Smith
  • Patent number: 9229753
    Abstract: A customizer autonomically customizes a virtual appliance by retrieving customization values for various customizable properties of a virtual machine from various providers to customize the virtual appliance in order to simplify deployment of the virtual appliance. The customization properties may include CPU properties, memory properties, storage properties, network properties and properties specific to the software in the virtual appliance. The customizer allows an end user to initiate autonomic customization of the virtual appliance at various times prior to deployment of the virtual appliance. The customizer also allows the user to provide additional customization upon execution.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: January 5, 2016
    Assignee: International Business Machines Corporation
    Inventors: Riz Amanuddin, Luis Alexandro Garcia
  • Patent number: 9229716
    Abstract: According to one aspect of the present disclosure, a method and technique for task priority boost management is disclosed. The method includes: responsive to a thread executing in user mode an instruction to boost a priority of the thread, accessing a boost register, the boost register accessible in kernel mode; determining a value of the boost register; and responsive to determining that the boost register holds a non-zero value, boosting the priority of the thread.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: January 5, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Christopher Francois, Giles R. Frazier, Bruce G. Mealey, Suresh E. Warrier
  • Patent number: 9218203
    Abstract: The present invention discloses a method, an apparatus, and a system for scheduling a processor core in a multiprocessor core system, which relate to the field of multiprocessor core systems, and can meet the demand for real-time network I/O processing, thereby improving the efficiency of the multiprocessor core system. The method for scheduling a processor core in a multiprocessor core system includes: obtaining, in the running process of the multiprocessor core system, a first control parameter, a second control parameter, a third control parameter, and a fourth control parameter; transferring a packet of a data flow that enters the multiprocessor core system to an idle processor core for processing based on the first control parameter, the second control parameter, and the third control parameter; and switching over the processor core in the multiprocessor core system between an interruption mode and a polling mode based on the fourth control parameter.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: December 22, 2015
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Jiaqiang Yu, Wei Zheng
  • Patent number: 9213513
    Abstract: A virtual printer driver or proxy printer driver executed by a virtual machine communicates with a real printer driver executed by a host computer to enable application programs executed by the virtual machine to print data on printers that are accessible by the host computer.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: December 15, 2015
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: George Hartz, Eric Fontana, David Fusari
  • Patent number: 9213572
    Abstract: Exemplary methods, apparatuses, and systems determine a list of virtual machines to be subject to a corrective action. When one or more of the listed virtual machines have dependencies upon other virtual machines, network connections, or storage devices, the determination of the list includes determining that the dependencies of the one or more virtual machines have been met. An attempt to restart or take another corrective action for the first virtual machine within the list is made. A second virtual machine that is currently deployed and running or powered off or paused in response to the corrective action for the first virtual machine is determined to be dependent upon the first virtual machine. In response to the second virtual machine's dependencies having been met by the attempt to restart or take corrective action for the first virtual machine, the second virtual machine is added to the list of virtual machines.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: December 15, 2015
    Assignee: VMware, Inc.
    Inventors: Keith Farkas, Elisha Ziskind, Joanne Ren
  • Patent number: 9207996
    Abstract: Technologies related to active lock information maintenance and retrieval are generally described. In some examples, a computing device may be configured to maintain active lock information including lock identifiers for active locks, lock access identifiers corresponding to a number of times a lock has been placed and/or released, and/or lock owner identifiers corresponding to threads placing locks. The computing device may provide an active lock information system configured to return active lock information including some or all of the lock identifiers for active locks, lock access identifiers, and/or lock owner identifiers in response to active lock information requests.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: December 8, 2015
    Assignee: EMPIRE TECHNOLOGY DEVELOPMENT LLC
    Inventor: Shmuel Ur
  • Patent number: 9207963
    Abstract: Technologies are presented for a network/hypervisor approach to maintain a stable and separate network address for the hypervisor on a multi-tenant system and changeable network addresses for the virtual machines (VMs). In some examples, the VM addresses may be decoupled from the domain address for the hypervisor so they can be changed arbitrarily and independently without impacting command messaging, and the domain address for the hypervisor may not form a part of the delivery chain for messages to the VMs. The system may also consume only the same number of IP addresses as currently used.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: December 8, 2015
    Assignee: Empire Technology Development LLC
    Inventor: Ezekiel Kruglick
  • Patent number: 9183029
    Abstract: A mechanism for synchronizing backend peripheral devices with a virtual machine (VM) running state is disclosed. A method of the invention includes modifying a running state of a (VM managed by a hypervisor of a host machine, and updating a VM state indication associated with the VM to reflect the change in running state of the VM, wherein a peripheral device associated with the VM accesses the VM state indication to determine wh her to continue processing a VM state changing instruction.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: November 10, 2015
    Assignee: Red Hat Israel, Ltd.
    Inventor: Michael S Tsirkin
  • Patent number: 9170841
    Abstract: A multiprocessor system includes a plurality of processors, each including a task scheduler that determines a task execution order of tasks in a task set to be executed by the processors within a task period which is defined as a period in repeated execution of the task sets; and a scheduler management device having a command unit configured to issue a command for at least one of the task schedulers to change the task execution order, wherein each of the at least one of the task schedulers, when receiving the command from the command unit, changes the task execution order of the corresponding processor.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: October 27, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kiyokazu Fukuzaki, Masanori Henmi, Hazuki Okabayashi, Hiroyuki Murata, Takatsugu Sawai, Hiroyuki Shigeta
  • Patent number: 9165266
    Abstract: This invention outlines a method that distributes the decision-making process according to the application owners' needs, through the use of chip management and brokering technologies in an auction-like environment which allows for very fluid business need changes. This disclosure describes a master framework for a family of disclosures which allows consumers to more efficiently obtain, modify, and utilize computing resources from providers. These elemental biddable resources are obtained through several brokering algorithms and associated winning bid strategies which redefine how applications and businesses can receive the most appropriate service for the least cost, at the most appropriate interval. The resource management framework includes business units, buyer's agents, resource unit brokers, resource unit capacity planners, and resource allocation software, and an optional change and configuration manager.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: October 20, 2015
    Assignee: International Business Machines Corporation
    Inventors: Gregory J. Boss, Christopher J. Dawson, Rick A. Hamilton, II, Timothy M. Waters
  • Patent number: 9164813
    Abstract: In an embodiment, a first thread of a plurality of threads of a program is halted. A subset of the plurality of threads are determined that are waiting for a mutex that is locked by the first thread while the first thread is halted. Identifiers of the subset of the plurality of threads are presented. The subset of the plurality of threads may have their execution directly blocked and/or indirectly blocked by a lock on the mutex by the first thread. In embodiment, the first thread is halted in response to the first thread encountering a breakpoint, and the subset of the plurality of threads do not halt in response to the first thread encountering the breakpoint.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: October 20, 2015
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Cary L. Bates
  • Patent number: 9147215
    Abstract: The present invention provides discrete, depleting chips for allocating computational resources for obtaining desired service level characteristics, wherein discrete chips deplete from a maximum allocated amount but may, in an optional implementation, be allowed to be replenished through the purchase of additional chips. A number of chips are assigned to a requestor/party, known as a business unit (BU), which could be a department, or group providing like-functionality services. In one implementation, the chips themselves could represent base monetary units integrated over time.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: September 29, 2015
    Assignee: International Business Machines Corporation
    Inventors: Gregory J. Boss, Christopher J. Dawson, Rick A. Hamilton, II, Timothy M. Waters
  • Patent number: 9146755
    Abstract: Configuration settings can be transferred from one machine by executing a first client application on a source machine to retrieve the configuration settings of the source machine. The configuration settings may be transformed into a platform and application independent format before being transferred to a target machine where a second client application transforms the configuration settings into platform or application dependent parameters appropriate for the target machine. In one example, the configuration parameters include a power policy that can be applied across a network.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: September 29, 2015
    Assignee: KASEYA LIMITED
    Inventors: Nick Lassonde, Kevin Hartsock