Abstract: A semiconductor device includes a channel structure, a dielectric structure, a gate structure, a first conductive structure, and a second conductive structure. The channel structure has a top surface, a bottom surface, and a sidewall extending from the top surface to the bottom surface. The first conductive structure is disposed on the bottom surface of the channel structure and includes a body portion and at least one convex portion, and a top surface of the convex portion is higher than a top surface of the body portion. The second conductive structure is disposed on the top surface of the channel structure and includes a body portion and at least one convex portion, and a bottom surface of the body portion is higher than a bottom surface of the convex portion.
Abstract: A semiconductor power module including first and second power transistors situated in parallel between first collector and first emitter strip conductors. A first connection surface of each of the power transistors is electroconductively connected to the first collector strip conductor, and a second connection surface of each of the power transistors is electroconductively connected to the first emitter strip conductor, so that a current flowing between the first collector strip conductor and the first emitter strip conductor is divided between the power transistors when the power transistors are each conductively connected via an applied control voltage. A first external power contact is directly contacted with the first collector strip conductor at a first contact area, a second external power contact is contacted with the first emitter strip conductor at a second contact area via a first connecting element, and the second contact area is positioned asymmetrically between the power transistors.
Type:
Grant
Filed:
April 8, 2020
Date of Patent:
April 30, 2024
Assignee:
ROBERT BOSCH GMBH
Inventors:
Christian Marc Lautensack, Alexander Kaiser, Jan Homoth
Abstract: A MOSFET device die includes an active area formed on a semiconductor substrate. The active area includes a first active area portion and a second active area portion. At least one mesa is formed in the semiconductor substrate extending in a longitudinal direction through the active area. The at least one mesa includes a channel region extending in a longitudinal direction. The channel region includes low threshold voltage channel portions and high threshold voltage channel portions. The first active area portion includes the channel portions in a first ratio of low threshold voltage channel portions to high threshold voltage channel portions, and the second active area portion includes channel portions in a second ratio of low threshold voltage channel portions to high threshold voltage channel portions. The first ratio is larger than the second ratio.