Patents Examined by Evral E Bodden
  • Patent number: 10977021
    Abstract: A secure element (SE) applet installation method, applied to a user terminal with a trusted execution environment (TEE) and an SE, and the TEE is provided with a trusted application (TA). The SE applet installation method includes obtaining, by the TA, an SE applet command package after the user terminal receives an installation request instructing the TA to obtain the SE applet command package, parsing, by the TA, the SE applet command package to obtain target signaling included in the SE applet command package, where the target signaling being used to install a target SE applet, and sending, by the TA, the target signaling to the SE to install the target SE applet according to the target signaling.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: April 13, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Hui Li, Meilun Xie, Zhuofei Li
  • Patent number: 10970109
    Abstract: A system, method, and computer program product are provided for managing a plurality of heterogeneous software robots to automate business processes. The system provides an architecture for use in forming business automation systems comprising a plurality of software robots designed to implement specific operations used for implementation of a business process spanned across multiple systems. The system also provides command and control for automation systems comprising a plurality of software agents adapted to implement specific tasks using on screen application integration, application programming interfaces (APIs), or database access to fetch or insert the required data.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: April 6, 2021
    Assignee: AMDOCS DEVELOPMENT LIMITED
    Inventors: Evgeni Berenstein, Zeev Eisen, Eadan Agur, Boris Rozenblit
  • Patent number: 10956413
    Abstract: A database system translates a received set of workflow actions into a graph of nodes. The graph of nodes includes a node set corresponding to each node type of the set of workflow actions. Each node set may be re-executable for each instance of an action type of the set of workflow actions. Upon completion of an action, the graph of nodes is executed. Execution of the graph of nodes includes executing processor executable instructions corresponding to a subset of the set of workflow actions. The subset may be determined based on the completed action. The completed action may be determined based on a sequence tracking parameter.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: March 23, 2021
    Assignee: salesforce.com, inc.
    Inventors: Ashwin Kashyap, Arthur Kong, Philip Alexander Waligora, Margaret Cyrzan, Anjali Ashok
  • Patent number: 10956148
    Abstract: Provided are techniques for concurrent Input/Output (I/O) enclosure firmware/Field-Programmable Gate Array (FPGA) update in a multi-node environment. First notifications are sent to each I/O enclosure management engine on each of a plurality of server nodes that code activation for a first set of I/O enclosures is starting. An update image is distributed to the first set of I/O enclosures. The update image on the first set of I/O enclosures is activated by sending an activate reset command to each of the first set of I/O enclosures, wherein a reset is not propagated to other devices within each I/O enclosure in the first set of I/O enclosures in response to determining that the reset is an activate reset. In response to the activate reset command completing, second notifications are sent to each I/O enclosure management engine that code activation for the first set of I/O enclosures has completed.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: March 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Gary W. Batchelor, Veronica S. Davila, Enrique Q. Garcia, Robin Han, Jay T. Kirch, Ronald D. Martens, Trung N. Nguyen, Brian A. Rinaldi, Todd C. Sorenson
  • Patent number: 10949257
    Abstract: Disclosed is a method and system for using a credit-based approach to scheduling workload in a compute environment. The method includes determining server capacity and load of a compute environment and running a first benchmark job to calibrate a resource scheduler. The method includes partitioning, based on the calibration, the compute environment into multiple priority portions (e.g. first portion, second portion etc.) and optionally a reserve portion. Credits are assigned to allocate system capacity or resources per time quanta. The method includes running a benchmark job to calibrate a complexity of supported job types to be run in the compute environment. When a request for capacity is received, the workload is assigned one or more credits and credits are withdrawn from the submitting entity's account for access to the compute environment at a scheduled time.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: March 16, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Rajesh Kumar, Amit Mittal, Anjali Gugle, Hetal N. Badheka, Vasantha K. Tammana, Priyatam Prasad Veyyakula
  • Patent number: 10936304
    Abstract: Disclosed embodiments relate to adjusting vehicle Electronic Control Unit (ECU) software versions. Operations may include receiving a prompt to adjust an ECU of a vehicle from executing a first version of ECU software to a second version of ECU software; configuring, in response to the prompt and based on a delta file corresponding to the second version of ECU software, the second version of ECU software on the ECU in the vehicle for execution; and configuring, in response to the prompt, the first version of ECU software on the ECU in the vehicle to become non-executable.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: March 2, 2021
    Assignee: Aurora Labs Ltd.
    Inventor: Zohar Fox
  • Patent number: 10936769
    Abstract: Systems and methods evaluate simulation models and measure floating point arithmetic errors in terms of Unit in Last Place (ULP). The simulation model may include model elements that perform numerical computations using Native Floating Point (NFP) arithmetic. The model elements may be arranged to implement a procedure. A data store may include local ULP errors predetermined for the model elements. The systems and methods may retrieve the local ULP errors for the model elements included in the model, and may apply a rules-based analysis to compute an overall ULP error of the simulation model. The systems and methods may present the overall ULP computed for the model. The systems and methods may also present intermediate ULP errors determined for portions of the simulation model. Changes may be made to the model to reduce the overall ULP error.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: March 2, 2021
    Assignee: The MathWorks, Inc.
    Inventors: Kiran K. Kintali, Shomit Dutta, E. Mehran Mestchian, Pieter J. Mosterman
  • Patent number: 10928799
    Abstract: Systems, methods, and apparatus are disclosed for machining a part. Methods include generating a first spatial representation identifying a first orientation of a machining tool, and mechanically coupling an end effector to the part at a first position, the end effector including the machining tool and a coupling tool. Methods include generating a second spatial representation identifying a second orientation of the machining tool relative to the part, the first and second spatial representations being generated based on images captured by at least one imaging device and measurements from a plurality of sensors. Methods include identifying a plurality of differences that result from the coupling and that include a rotational distance and translational distance, the identifying being based on a comparison of a first image and a second image. Methods include adjusting the machining tool to return the machining tool to the first orientation at the first position.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: February 23, 2021
    Assignee: The Boeing Company
    Inventors: Luke Fletcher, Phillip J. Crothers
  • Patent number: 10922218
    Abstract: Disclosed herein are techniques for identifying software interdependencies based on functional line-of-code behavior and relation models. Techniques include identifying a first portion of executable code associated with a first controller; accessing a functional line-of-code behavior and relation model representing functionality of the first portion of executable code and a second portion of executable code; determining, based on the functional line-of-code behavior and relation model, that the second portion of executable code is interdependent with the first portion of executable code; and generating, based on the determined interdependency, a report identifying the interdependent first portion of executable code and second portion of executable code.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: February 16, 2021
    Assignee: Aurora Labs Ltd.
    Inventors: Zohar Fox, Carmit Sahar
  • Patent number: 10922076
    Abstract: Aspects of the present disclosure provide systems for managing product development that include receiving development data. The systems record an amount of time spent developing one or more project features; calculate, based at least in part on development data and the amount of time spent developing the feature, business momentum; and calculate, based on certain development data, project agility and market agility.
    Type: Grant
    Filed: December 9, 2019
    Date of Patent: February 16, 2021
    Assignee: Agile Worx, LLC
    Inventor: David Anthony Bishop
  • Patent number: 10922067
    Abstract: One example system includes an export engine to generate an environment agnostic configuration file and an environment properties data structure based on a server program executing in the environment. The environment-agnostic configuration file includes representations of a set of environment dependent attributes from the set of configuration information, each representation for an environment dependent attribute including at least one token that replaces a value of the attribute in the representation, and representations of members of a set of environment independent attributes from the set of configuration information that are equivalent between two different environments. The environment properties data structure has, for each environment, a value that corresponds to the at least one token. An example system may compare previously generated files with current files to identify differences.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: February 16, 2021
    Assignee: BladeLogic, Inc.
    Inventor: Robert E. Reeves
  • Patent number: 10922146
    Abstract: Systems and methods are provided for synchronizing execution of program code for an integrated circuit device having multiple concurrently operating execution engines, where the operation of one execution engine may be dependent on the operation of another execution engine. Data or resource dependencies may be accommodated with a Set instruction to cause a first execution engine to set a register value and a Wait instruction to cause a second execution engine to wait for a condition associate with the register value. Concurrently operation of the execution engines may thus be synchronized.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: February 16, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Ilya Minkin, Ron Diamant, Drazen Borkovic, Jindrich Zejda, Dana Michelle Vantrease
  • Patent number: 10901379
    Abstract: Methods and systems are described for controlling parameters in a building. According to at least one embodiment, a method for controlling parameters in a building includes using a first sensor type to determine whether the building is occupied and using a second sensor type to determine how reliable the first sensor type determines occupancy.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: January 26, 2021
    Assignee: Vivint, Inc.
    Inventors: Brandon Bunker, Jungtaik Hwang
  • Patent number: 10901786
    Abstract: A method and system of managing operating system (OS) jitter are provided. Power consumption information is received for a first time period of a compute node of the plurality of compute nodes of a large-scale computing system, wherein the compute node is running a subject program. A digital signature of a power spectrum of the compute node is determined based on the power consumption information. The digital signature of the power spectrum is compared to a baseline power spectrum. Upon determining that the digital signature of the power spectrum varies beyond a threshold from the baseline power spectrum, the subject program is identified as a source of incompatible OS jitter. An OS jitter mitigation measure is performed. Upon determining that the digital signature of the power spectrum does not vary beyond the threshold from the baseline power spectrum, the digital signature of the power spectrum is stored in a memory.
    Type: Grant
    Filed: March 9, 2019
    Date of Patent: January 26, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vadim Elisseev, Kirk Jordan
  • Patent number: 10866881
    Abstract: A method for firmware debug trace capture includes creating a hand-off block (“HOB”), capturing first debug trace statements during a boot sequence of a computer and writing the first debug trace statements to the HOB. A trace memory buffer can be created and the first debug trace statements can be copied from the HOB to the trace memory buffer. Second debug trace statements are captured during the boot sequence and appended to the trace memory buffer. In some configurations, the first debug trace statements can be written to the HOB during the pre-Extensible Firmware Interface initialization (“PEI”) phase of the boot sequence and the second debug trace statements can be written to the trace memory buffer during the driver execution (“DXE”) phase of the boot sequence.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: December 15, 2020
    Assignee: American Megatrends International, LLC
    Inventors: Michael Harry Deiderich, III, Matthew Hoffmann, Thomas Gilreath
  • Patent number: 10853105
    Abstract: Described embodiments provide systems and methods for augmentation, instrumentation, and other runtime modifications of bytecode-based applications through introduction of static and dynamic hooks. In at least one aspect, described is a system for hooking Java native interface calls from native code to Java code in a Java virtual machine. In at least one aspect, described is a system for static hooking of a Windows Universal application. In at least one aspect, described is a system for dynamically hooking a Windows Universal application.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: December 1, 2020
    Assignee: Citrix Systems, Inc.
    Inventors: Jeff Dowling, Abraham Mir
  • Patent number: 10853198
    Abstract: Systems, computer program products, and methods are described herein for restoring a transformation state using blockchain technology. The present invention is configured to electronically receive a data transformation request to implement one or more changes to one or more target systems; electronically extract data from one or more source systems based on at least receiving the one or more data transformation protocols; determine the one or more target systems associated with the data transformation request; generate an image of the first state of the one or more target systems; generate a cryptodigit associated with the first state of the one or more target systems; store the generated cryptodigit and the image of the first state of the one or more target systems as a first node in a blockchain distributed ledger; and implement the one or more changes to the one or more target systems.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: December 1, 2020
    Assignee: BANK OF AMERICA CORPORATION
    Inventors: Haribabu Reddy Marthala, Bhagat Kumar Allugubelly
  • Patent number: 10853223
    Abstract: Simulation processing is performed on a host apparatus in respective time periods to simulate operation of simulated agents of a target apparatus. During each time period, the simulation processing exclusively simulates operation of a single simulated agent. When the target program code processed in a current time period allocated for simulation of a given simulated agent includes a transaction start instruction representing a start of a transaction comprising instructions executed between the transaction start instruction and a transaction end instruction for which effects of the instructions of the transaction are to be committed when the transaction end instruction is reached in the absence of the transaction being aborted, it is detected whether the current time period ends before the transaction end instruction of the transaction is reached, and if so the transaction is aborted. This enables a correct transaction behaviour to be simulated without requiring memory conflict checking.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: December 1, 2020
    Assignee: Arm Limited
    Inventors: Benjamin Jean-Baptiste Damet, Mihail Ivanov Atanassov
  • Patent number: 10831471
    Abstract: A computing device is provided, including a non-volatile storage device and a processor configured to execute a distributed version control system. The processor may, via the distributed version control system, receive a pull request to apply a first set of one or more source code files to a project database. In response to receiving the pull request, the processor may identify a second set of one or more source code files based at least in part on a recommendation ruleset including one or more association rules identified for a plurality of training pull requests applied to a training project database. The recommendation ruleset may be determined based at least in part on a respective last iteration of each training pull request. The processor may output a source code file recommendation notification including an indication of each source code file of the second set.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: November 10, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Stanislaw Wiktor Swierc, Hitesh Shyamlal Sajnani
  • Patent number: 10831535
    Abstract: Preferred embodiments of systems and methods are disclosed to reduce a minimal working voltage, Vmin, and/or increase the frequency of Vmin while executing multithreaded computer programs with better reliability, efficiency, and performance. A computer complier complies multiple copies of high-level code, each with different a different set of resource allocators so system resources are allocated during simultaneous execution of multiple threads in a way that allows reducing Vmin at a given reference voltage frequency and/or increasing the frequency of Vmin at a given Vmin value.
    Type: Grant
    Filed: January 1, 2019
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Jingwen Leng, Alper Buyuktosunoglu, Pradip Bose, Ramon Bertran Monfort