Abstract: A Synchronous Ethernet (SyncE) network device includes a pair of phase-locked loops including a first phase-locked loop responsive to a SyncE input clock and a second phase-locked loop coupled to the first phase-locked loop. The second phase-locked loop is configured to be simultaneously lockable to both the SyncE input clock via the first phase-locked loop and an IEEE 1588 packet stream, during a locked mode of operation, and also lockable to the SyncE input clock during a holdover mode of operation which is triggered in response to a failure of the IEEE 1588 packet stream.

Abstract: A method for generating Manchester-decoded binary values is disclosed, in which a signal having signal edges is first of all read in. A first sequence of decoded binary values is then generated by means of first Manchester decoding, in which a decoded binary value is allocated to each signal edge of the signal. A second sequence of decoded binary values is then generated by means of second Manchester decoding, in which a decoded binary value is allocated to every second signal edge. The second sequence is rejected if a signal edge of the signal which is not allowed with respect to the second Manchester decoding occurs. The first sequence is rejected if a signal edge of the signal which is required with respect to the first Manchester decoding is missing.

Abstract: In an example, there is disclosed a system and method for detecting and correcting error in a quadrature receiver (QR). The QR may include a receiver channel operable to divide a received RF signal into I and Q channels. The receiver channel may include error sources, such as (in sequence) pre-demodulation (PD) error, LO mixer error, and baseband (BB) error. Test tones may be driven on the receiver channel at a plurality of test frequencies, and a quadrature error corrector may be provided to detect error from each source. Upon receiving an RF signal, the quadrature error corrector may apply correction coefficients to correct each source of error in reverse sequence (BB, LO, PD).

Abstract: In an example, there is disclosed a system and method for detecting and correcting error in a quadrature receiver (QR). The QR may include a receiver channel operable to divide a received RF signal into I and Q channels. The receiver channel may include error sources, such as (in sequence) pre-demodulation (PD) error, LO mixer error, and baseband (BB) error. Test tones may be driven on the receiver channel at a plurality of test frequencies, and a quadrature error corrector may be provided to detect error from each source. Upon receiving an RF signal, the quadrature error corrector may apply correction coefficients to correct each source of error in reverse sequence (BB, LO, PD).

Abstract: An important component in digital circuits is a phase rotator, which permits precise time-shifting (or equivalently, phase rotation) of a clock signal within a clock period. A digital phase rotator can access multiple discrete values of phase under digital control. Such a device can have application in digital clock synchronization circuits, and can also be used for a digital phase modulator that encodes a digital signal. A digital phase rotator has been implemented in superconducting integrated circuit technology, using rapid single-flux-quantum logic (RSFQ). This circuit can exhibit positive or negative phase shifts of a multi-phase clock. Arbitrary precision can be obtained by cascading a plurality of phase rotator stages. Such a circuit forms a phase-modulator that is the core of a direct digital synthesizer that can operate at multi-gigahertz radio frequencies.

Abstract: A system for adaptively eliminating intermods from a spectrum generated by combining two or more signals in a component or circuit includes a sampler for sampling an output signal of the component or circuit, a signal source for generating a conversion signal having a frequency matched to a target intermod of the spectrum, and a cancellation circuit to generate a cancellation phasor. The cancellation circuit is configured to receive the generated conversion signal and the sampled output signal and generate a cancellation phasor therefrom having a phase and amplitude configured to cancel the target intermod. A combining network can combine the cancellation phasor into the component or circuit to cancel the target intermod from the spectrum.

Abstract: A system for an orthogonal frequency division multiplexed (OFDM) equalizer, said system comprising a program memory, a program sequencer and a processing unit connected to each other, wherein the processing unit comprises an input selection unit, an arithmetic logic unit (ALU), a coprocessor and an output selection unit; further wherein the program sequencer schedules the processing of one or more symbol-carrier pairs input to said OFDM equalizer using multiple threads; retrieves, for each of the one or more symbol-carrier pairs, multiple program instructions from said program memory; generates multiple expanded instructions corresponding to said retrieved multiple program instructions; and further wherein said ALU performs said processing of the one or more symbol-carrier pairs using the multiple threads across multiple pipeline stages, wherein said processing comprises said ALU executing arithmetic operations to process said expanded instructions using said multiple threads across the multiple pipeline stag

Abstract: A method for transmitting data in a multiple-input-multiple-output space-time coded communication using a mapping table mapping a plurality of symbols defining the communication to respective antennae from amongst a plurality of transmission antennae and to at least one other transmission resource. The mapping table may comprise Alamouti-coded primary segments and may also comprise secondary segments, comprising primary segments. The primary segments in the secondary segments may be defined in accordance to an to Alamouti based code pattern applied at the segment level to define a segment-level Alamouti based code.

Abstract: A method for transmitting data in a multiple-input-multiple-output space-time coded communication using a mapping table mapping a plurality of symbols defining the communication to respective antennae from amongst a plurality of transmission antennae and to at least one other transmission resource. The mapping table may comprise Alamouti-coded primary segments and may also comprise secondary segments, comprising primary segments. The primary segments in the secondary segments may be defined in accordance to an to Alamouti based code pattern applied at the segment level to define a segment-level Alamouti based code.

Abstract: A system and method for system and method for multiplexing control and data channels in a multiple input, multiple output (MIMO) communications system are provided. A method for transmitting control symbols and data symbols on multiple MIMO layers includes selecting a first set of codewords from Ncw codewords, distributing control symbols onto the first set of layers, placing data symbols of the first set of codewords onto the first set of layers, placing data symbols of the (Ncw-Ncw1) remaining codewords to remaining layers if Ncw>Ncw1, and transmitting the multiple MIMO layers. The first set of codewords is associated with a first set of layers from the multiple MIMO layers, and the Ncw codewords are to be transmitted simultaneously and the first set of codewords comprises Ncw1 MIMO codewords, where Ncw and Ncw1 are integers greater than or equal to 1. The remaining layers are MIMO layers from the multiple MIMO layers not in the first set of layers.

Abstract: Methods and apparatuses to determine a frequency adjustment in a mobile wireless device are disclosed. A method includes determining a coarse frequency error estimate and multiple fine frequency error estimates; selecting at least one candidate fine frequency error estimate having a frequency value closest to a corresponding frequency value for the coarse frequency error estimate; and determining a frequency adjustment based on a combination of the coarse frequency error estimate and the selected at least one candidate fine frequency error estimate. In an embodiment, the method further includes calculating a confidence metric for the coarse frequency error estimate; when the confidence metric exceeds a threshold value, determining the frequency adjustment based on the candidate fine frequency error estimate; otherwise, determining the frequency adjustment based on a fine frequency error estimate in the plurality of fine frequency error estimates closest to a most recent previous fine frequency error estimate.

Abstract: A PLC network system and method operative with OFDM for generating MIMO frames with suitable preamble portions configured to provide backward compatibility with legacy PLC devices and facilitate different receiver tasks such as frame detection and symbol timing, channel estimation and automatic gain control (AGC), including robust preamble detection in the presence of impulsive noise and frequency-selective channels of the PLC network. To reduce collisions in a network, a MIMO PLC transmitter device may selectively perturb legacy FCH data so as to ensure a maximum back-off time by a legacy PLC receiver.

Abstract: A wireless communication base station device, whereby precision of propagation path estimation is improved by making possible determination of the contiguity of precoding strings contiguous in frequency regions. In this device, a pre-coding string contiguity determining portion (120) determines whether or not a plurality of pre-coding strings (?) which are input from a pre-coding string calculating portion (119) are contiguous in a frequency region. The pre-coding string contiguity determining portion (120) outputs smoothing possibility data, which indicate determination results, to a control data generating portion (104). The control data generating portion (104) generates control data indicating smoothing possibility data which is input from the pre-coding string contiguity determining portion (120).

Abstract: Signals propagating from an aggressor communication channel can cause detrimental interference in a victim communication channel. One or more noise cancellers can generate an interference compensation signal to suppress or cancel the interference based on one or more settings. A controller can execute algorithms to find preferred settings for the noise canceller(s). The controller can use a feedback signal (e.g., receive signal quality indicator) received from a victim receiver during the execution of the algorithm(s) to find the preferred settings. One exemplary algorithm includes sequentially evaluating the feedback resulting from a predetermined list of settings. Another algorithm includes determining whether to move from one setting to the next based on the feedback values for both settings. Yet another algorithm includes evaluating a number of sample settings to determine which of the sample settings result in a better feedback value and searching around that sample setting for a preferred setting.

Abstract: A transmission circuit including an equalizer circuit, a slicer circuit, a signal detection circuit, and a control circuit is provided. The equalizer circuit performs an equalizing operation on an input signal according to preset states to output an equalizing signal corresponding to each preset state. The slicer circuit performs a slicing operation on the equalizing signal to output a slicing signal. The signal detection circuit detects and compares the equalizing signal and the slicing signal and accordingly adjusts the equalizer circuit to one of the preset states. The control circuit receives the slicing signal corresponding to each preset state, compares the slicing signal corresponding to each preset state with a plurality of signal patterns to generate a comparison result, and selects one of the preset states according to the comparison result, such that the control circuit let the equalizer circuit perform the equalizing operation according to the selected preset state.

Abstract: Disclosed is an apparatus and method for near field communication in an ultra wideband (UWB). An apparatus for near field communication in an UWB may include a determiner to determine the number of repetitions of a first sequence in each of n preambles, n denoting a natural number, and a processor to generate n short preambles by repeatedly arranging the first sequence based on the determined number of repetitions, and to generate the n preambles by arranging a long preamble with respect to each of the generated n short preambles.

Abstract: A method of equalizing an input data signal using a multiple-stage continuous-time linear equalization (CTLE) circuit. A zero-forcing least-mean-square (ZF LMS) procedure is applied to adapt the settings of the CTLE stages. The amplitude settings and the frequency boost settings of the CTLE stages are adapted within the ZF LMS procedure. In an exemplary implementation, an error screening threshold may be applied to an error signal within the ZF LMS procedure to generate a reduced error signal such that weight updates do not occur if the error signal is below the error screening threshold. In addition, if an accumulated sign error signal within the ZF LMS procedure reaches a predetermined maximum indicative of a high loss channel, then a setting for a variable gain amplifier may be increased, and an amplitude setting for the CTLE circuit may be decreased. Other embodiments, aspects and features are also disclosed.

Abstract: A system and method involve subtracting a positive bias from a symbol timing offset estimate determined by an estimator in an orthogonal frequency division multiplexing (OFDM) receiver. The bias may be determined based upon a channel order and/or the length of a cyclic prefix of a received OFDM symbol. If based upon the length of the cyclic prefix, the bias may be less than or equal to half the length of the cyclic prefix. The estimator may be a blind estimator, a coarse estimator, or a blind coarse estimator. The OFDM receiver may have N cp 2 + 1 parallel channels, where Ncp is the number of samples of a cyclic prefix of the received OFDM symbol, where the positive bias is different for each channel.

Abstract: According to embodiments of the present invention, a transmitter is provided. The transmitter includes a frequency shift keying (FSK) circuit, and a phase shift keying (PSK) circuit coupled in series to the FSK circuit, wherein the FSK circuit is configured, in a first mode of operation, to provide a FSK modulated signal to the PSK circuit, and, in a second mode of operation, to provide a fixed frequency signal to the PSK circuit, and wherein the PSK circuit is configured, in the first mode of operation, to transmit the FSK modulated signal, and, in the second mode of operation, to provide a PSK modulated signal based on the fixed frequency signal received from the FSK circuit.

Abstract: A system includes a memory controller and a plurality of semiconductor devices that are series-connected. Each of the devices has memory core for storing data. The memory controller provides a clock signal for synchronizing the operations of the devices. Each device includes a phase-locked loop (PLL) that is selectively enabled or disabled by a PLL enable signal. In each group, the PLLs of a selected number of devices are enabled by PLL enable signals and the other devices are disabled. The enabled PLL provides a plurality of reproduced clock signals with a phase shift of a multiple of 90° in response to an input clock signal. The data transfer is synchronized with at least one of the reproduced clock signals. In the devices of disabled PLLs, the data transfer is synchronized with the input clock signal. The enabled PLL and disabled PLL cause the devices to be the source and the common synchronous clocking, respectively. The devices can be grouped.