Abstract: An analogue display interface apparatus for providing analog color signals to a digital display unit includes a table look-up mechanism that provides digital representations of color signals to a color palette, wherein some of the values stored in the lookup table are received from the output of a calibration mechanism that displays a plurality of color choices on the digital display unit for selection by a user.

Abstract: An integrated circuit such as a video controller may be provided with core logic circuitry using CMOS technology which may be operated at different supply voltages such as 3.3 or 5 Volts. At lower supply voltages, the CMOS circuitry may run slower. For a video controller, certain higher resolution, pixel depths, and refresh rates may require high speed operation of the video controller. A monitoring circuit monitors the video mode, pixel resolution, pixel depth, and refresh rate and determines which supply voltage may be used to operate the video controller at such levels. An output signal from the monitoring circuit may be used by a switching circuit to supply an appropriate supply voltage to the integrated circuit. At lower performance levels, the integrated circuit may be operated at lower voltages to conserve power.

Abstract: A PDP not posing the problem that previous display data appears at the time of activation, and a wave generating circuit capable of generating a complex wave without the necessity of expanding a quantity of ROM data and of increasing a reading speed have been disclosed. A plasma display panel display comprising a plasma display panel that includes a plurality of cells to be selectively discharged to glow, a reset unit for bringing the plurality of cells to a given state, an addressing unit for setting the plurality of cells to states associated with display data, and a sustaining discharge unit for enabling the plurality of cells to glow according to the set states further comprises an operation halt factor detector for detecting the fact that a factor of halting the operation of the plasma display panel has occurred, and an initialization unit that when it is detected that the operation halt factor has occurred, initializes memory information in the plasma display panel.

Abstract: A linear address organization for physically storing mip maps and rip maps in memory is disclosed. The subsampled data arrays of the mip maps and rip maps are sequentially stored in continuous subsequences of a continuous sequence of memory addresses. The subsequences of addresses are assigned in order of level of subsampling of the data arrays which make up the mip map or rip map. In the case of a mip map, the subsequences are assigned to the data arrays in order of increasing level of subsampling. In the case of rip maps, the data arrays are segregated into groups according to a first one of the two subsampling directions, such that each array in a particular group has the same level of subsampling in the first direction. Subsequences are assigned to each group of data arrays.

Abstract: A driving method for a direct addressing type liquid crystal display device for displaying gradation by changing the amplitude of voltages applied to pixels, wherein a series of voltage pulses, as signal voltages, composed of a plurality of different voltage levels are applied in order to display a specified gradation, and for a display, a plurality kinds of gradation in which a part of the voltage levels is commonly used are selected.

Abstract: A flat display driving includes a gate driving circuit for sequentially and selectively applying a high voltage to a plurality of gate lines to drives them; a data driving circuit which includes a shift register for sequentially inputting one line of pixel data, a current source array which inputs on line of pixel data from the shift register, generates one line of current signals corresponding to each logic value of the pixel data and applies one line of current signals to the data lines and a latch type transmission array connected between the shift register and the current source array, for adjusting the supply time of one line of pixel data to be applied to the current source array, thereby driving the pixels on one horizontal line of the field emission display by the current signals for a predetermined time period; and a control circuit which processes a video signal into a series type of pixel data, supplies it to the data driving circuit and generates control signals required for the data driving circu

Abstract: A liquid crystal display panel includes a pixel array with a plurality of pixels arranged in a matrix of n rows and m columns, N signal lines each for applying a data signal to a predetermined pixel, a plurality of switching devices each formed at every pixel to turn on or off a path through which a data signal from a predetermined signal line is transmitted to a predetermined pixel according to a control signal, and M control lines for applying the control signal to each switching device, wherein the (2n-1)th signal line diverges at a predetermined point and passes through the (2n-1)th and (2n)th pixel columns in common, and the (2n)th signal line diverges at a predetermined point and passes through the (2n)th and (2n-1)th pixel columns in common, odd pixels of the (2n)th pixel column receiving a data signal loaded on the (2n)th signal line, even pixels of the (2n)th pixel column receiving a data signal loaded on the (2n-1)th signal line, odd pixels of the (2n-1)th pixel column receiving the data signal load

Abstract: An apparatus for correcting a chromaticity diagram by a variable brightness includes: a first grid voltage controller for controlling a first grid voltage to be a voltage of a predetermined level; a first grid voltage detector for detecting the first grid voltage output by the first grid voltage controller; a phase inverter for inverting a phase of a voltage signal detected by the first grid voltage detector; an analog-to-digital converter for converting the inputted voltage signal, which has been phase-inverted by the phase inverter, into a digital signal; a microprocessor for receiving the digital data of the first grid voltage output from the analog-to-digital converter to produce and output error data; a digital-to-analog converter for converting the error data supplied from the microprocessor into an analog signal, and a cut-off controller for receiving the analog signal output from the digital-to-analog converter and correcting a color-difference signal.

Abstract: In image data retrieval, image data that becomes the base of search is specified. When the search is to be carried out according to the distance from the image data on an image map, an automatic setting process of retrieval information is carried out. Here, a keyword, icon, chromaticity and the like of that image data are automatically set as retrieval information. The position of that image data on the image map becomes the center of a range when the ambiguity is set. By setting the ambiguity of the image map, keyword, icon, chromaticity, and the like in this state, the range of ambiguity is displayed, and image data within that range is automatically retrieved. As a result, analogous image data can be searched for according to subtle and ambiguous information or information that cannot be quantified.

Abstract: A liquid crystal display (LCD) includes a plurality of thin-film-transistor (TFT) LCD elements arranged in a plurality of rows, a respective one of the TFT LCD elements including a liquid crystal element having a pixel electrode and a common electrode, a storage capacitor having a first electrode and a second electrode connected to the pixel electrode, and a transistor having a controlled electrode connected to the pixel electrode and a gate electrode which controls current through the controlled electrode. A common electrode voltage is applied to the common electrodes of the liquid crystal elements of the plurality of TFT LCD elements. A respective gate driving voltage is applied to the gate electrodes of a respective row of the TFT LCD elements and to the first electrodes of the storage capacitors of another row of TFT LCD elements other than a first row of TFT LCD elements.

Abstract: A text image stretching system in a VGA for a plurality of text image font sizes comprises a plurality of cell line replication registers having inputs and outputs, the plurality of cell line replication registers formed into groups corresponding to one of the plurality of text image font sizes, each cell line replication register having a plurality of bits, the inputs of the plurality of cell line replication registers connected to the VGA to receive cell line replication information for storage in the plurality of cell line replication registers, a multiplexer having data inputs, first and second select inputs and a plurality of outputs, each of the data inputs connected to one of the plurality of bits of the plurality of cell line replication registers, the first and second select inputs decoded to select one bit from each of the cell line replication registers in one of the groups of the cell line replication registers to form a cell line replication code for output on the plurality of outputs, a repeat c

Abstract: A matrix liquid crystal display using an antiferroelectric liquid crystal prevents the displayed image from tailing off. The liquid crystal display includes a liquid crystal panel, a temperature sensor, a control unit, a scanning electrode driver circuit, and a signal electrode driver circuit. When the temperature of the liquid crystal panel is detected by the temperature sensor, the control unit increases or reduces the de-select period according to the detected temperature. The scanning electrode driver circuit and the signal electrode driver circuit serve to drive scanning electrodes and signal electrodes, respectively included in the liquid crystal panel according to control signals from the control unit and from a level converter. These control signals include a signal indicating the controlled de-select period. Thus, the controlled de-selected period is secured.

Abstract: A plurality of pixel elements are arranged in a matrix layout, and an alternating current exciting signal having a plurality of exciting pulses is supplied to each pixel element. Each pixel element has a first MOS-FET in which one picture signal is received at a drain every one horizontal scanning period, one scanning signal is received at a gate every one frame period and a charge signal having a charge voltage relating to a picture voltage of the picture signal is output from a source, a second MOS-FET in which the alternating current exciting signal is received at a drain, the charge signal is received at a gate and a pixel electrode voltage of a pixel electrode signal relating to the charge voltage is output from a source, a condenser for maintaining the charge voltage of the charge signal until a next frame period, and a liquid crystal displaying device for emitting light according to the pixel electrode signal to display a pixel image.

Abstract: A control circuit for providing a common electrode voltage for a liquid crystal display dynamically controls the voltage applied to the common electrode according to various factors that affect the capacitance across the liquid crystal layer. The common electrode control circuit dynamically adjusts the common electrode voltage according to the current maximum and minimum display voltages. In addition, the common electrode control circuit adjusts the common electrode voltage according to the gate-to-source parasitic capacitance, as well as temperature fluctuations. Thus, the control circuit compensates for the most significant factors which may cause he inadvertent accumulation of a charge across the liquid crystal layer.

Abstract: The pattern to be displayed on the display is constructed from at least three tone levels to display specific shapes such as letters and numeric characters. The pattern is designed so that the user will visually perceive different shapes when displayed at different display characteristics. The display characteristic is determined according to the user's perceived shape.

Abstract: An electro-optic display system having cover glass electrode modulation. The display system comprises an electro-optic layer disposed between first and second substrates having a single common electrode and a plurality of pixel electrodes, respectively. Voltage modulation of the common electrode is temporally related to image data acquisition by the pixel electrodes and allows data to be updated to each of the plurality of pixel electrodes simultaneously.

Abstract: A graph displaying device and method whereby when functional expression data for producing graphs and the conditions of displaying the graphs are set, graphs for functional expressions data input in accordance with the conditions are displayed in corresponding colors on a display. First, functional expression data and corresponding color data which designate display colors of the graphs are input in corresponding relationship. In addition, range data which display coordinates and color data designating display colors of coordinates involved in the range data are input together. In response to this operation, the graphs for the input functional expression data are produced with the range data to which the color data are designated, the last-mentioned color data corresponding to color data which correspond to the functional expression data. The produced graphs and the coordinates are displayed in the corresponding designated colors.

Abstract: A display apparatus permitting high resolution and a large number of gray-scale levels and causing indiscernible flicker has been disclosed. One frame is divided into or composed of j subframes, and light is produced according to a luminance level predetermined subframe by subframe in order to express intermediate gray-scale of a picture. Emphasis is put on the fact that display to be performed during each subframe within one frame can be controlled independently. An interlaced-scanning display is carried out during k subframes associated with low-order weighted bits out of j subframes, and a noninterlaced-scanning display is carried out during the other j-k subframes associated with high-order weighted bits. The ratio of an addressing scan time to a subframe associated with a small weight is large, and the ratio of an addressing scan time to a whole frame is very large. If the addressing scan time can be reduced as mentioned above, a great effect would be exerted.

Abstract: A graphics controller drives a flat-panel display and simultaneously drives an external cathode-ray-tube (CRT) display. Horizontal clock pulses continue to be applied to the flat panel during the CRT's vertical blanking or re-trace period so that the flat panel is not left in a constant state during the entire re-trace period. Leaving the flat panel in a constant state for a long period of time can cause flicker or delayed response immediately after the re-trace period ends. Running the horizontal clocks during the re-trace period can lead to D.C. buildup or rolling flicker, believed to be caused by a polarity-inversion counter in the panel assembly which is not designed to receive additional horizontal clocks beyond the number of lines on the flat panel. D.C. buildup in the flat panel is reduced by adding a high-frequency burst of horizontal clock pulses to the flat panel during the CRT's vertical re-trace period. The burst of clock pulses adjusts the count in the polarity-inversion counter.