Abstract: An analog circuit arrangement (1) to variably set a voltage Uout, within defined voltage limits, has a non-inverting adder (10) with a positive input (11). A voltage divider (20), with at least a first stage (21) and a second stage (22), is connected to the positive input (11) of the adder (10). At least one stage has a parallel circuit of n resistors (R1, R2, . . . , Rn) that are each connected in series in a conduction path (L1, L2, . . . , Ln) to an overcurrent protection device (F1, F2, . . . , Fn). At least one device (30) actively changes one or more of the overcurrent protection devices (F1, F2, . . . , Fn) into a state that interrupts the respective affected conduction path (L1, L2, . . . , Ln).

Abstract: A control circuit of a power converter and a control method thereof are provided. The control circuit includes an error amplifier, a controller, a digital filter, and a digital pulse width signal modulator. The error amplifying circuit is coupled to an output terminal of the power converter and provides a digital error signal. The controller provides a first working parameter corresponding to the first external control command when receiving a first external control command. The digital filter generates a current digital compensation value. The digital pulse width signal modulator generates a pulse width modulation signal. The controller provides a second working parameter corresponding to the second external control command when receiving a second external control command. The controller calculates a transition value according to the second working parameter and the current digital compensation value. The controller provides the second working parameter and the transition value to the digital filter.

Abstract: A method to operate a DC-DC power converter in a low power burst mode, the method including sampling an output voltage of the DC-DC power converter with a sampling frequency to determine when to initiate a burst for the low power burst mode; and adapting the sampling frequency based on the output voltage.

Abstract: The present document describes a power converter configured to convert electrical power at an input voltage at an input of the power converter to electrical power at an output voltage at an output of the power converter. The power converter comprises a first upper capacitor and a first lower capacitor, which are coupled with one another via a first mid node; a second upper capacitor and a second lower capacitor, which are coupled with one another via a second mid node; an inductor; and a set of power switches. In addition, the power converter comprises a control unit which is configured to control the set of power switches such that during an operation cycle the power converter is operated in a first main state and in a second main state in a mutually exclusive manner.

Abstract: A flyback power converter includes a controller, a high-end driving circuit, an active clamp switch, a main switch and a zero current detection circuit. The high-end driving circuit is coupled to the controller. The active clamp switch is coupled to the high-end driving circuit for driving the active clamp switch. The main switch is coupled to the controller. The zero current detection circuit is coupled to the controller. The main switch and the active clamp switch are arranged on the primary side of a transformer. The switching period of a gate of the active clamp switch and the switching period of a gate of the main switch are controlled in reverse phase to achieve zero voltage or zero current conversion.

Abstract: A power supply is provided. The power supply includes a power supply circuit and a control circuit. The power supply circuit includes a voltage converter and multiple point-of-load circuits. The voltage converter generates a third voltage according to a first voltage. The load point-of-load circuits generate at least one second voltage and at least one state signal according to the third voltage. The at least one second voltage is suitable for supplying power to a load. The control circuit is coupled to the power supply circuit. The control circuit determines whether a single event latch-up occurs in the power supply circuit according to the at least one state signal. When the single event latch-up occurs in the power supply circuit, the control circuit switches off the power supply circuit to stop generating the at least one second voltage and the at least one state signal.

Abstract: A power conversion device includes: a power conversion circuit connected to a direct-current power supply and a power system and configured to perform conversion between direct-current power and alternating-current power; a phase-locked loop circuit configured to output a phase instruction value based on a system alternating-current voltage phase of the power system; and a control circuit configured to control the power conversion circuit based on the phase instruction value from the phase-locked loop circuit. The phase-locked loop circuit includes: a phase difference calculation section configured to calculate a phase difference in a predetermined cycle, the phase difference representing a deviation of the phase instruction value from the system alternating-current voltage phase of the power system; a phase difference correction section; and a phase instruction value generation section configured to output the phase instruction value based on an output of the phase difference correction section.

Abstract: A power control integrated circuit (IC) chip can include a direct current (DC)-DC converter that outputs a switching voltage in response to a switching output enable signal. The power control IC chip can also include an inductor detect circuit that detects whether an inductor is conductively coupled to the DC-DC converter and a powered circuit component in response to an inductor detect signal. The power control IC chip can further include control logic that (i) controls the inductor detect signal based on an enable DC-DC signal and (ii) controls the switching output enable signal provided to the DC-DC converter and a linear output disable signal provided to a linear regulator based on a signal from the inductor detect circuit indicating whether the inductor is conductively coupled to the DC-DC converter and the powered circuit component.

Abstract: A self-driven active clamp circuit applied to a flyback converter having a transformer and a switch has a clamp switch and a resistor. The clamp switch is connected between a first capacitor and a second capacitor in series. Another terminal of the first capacitor is connected to a first terminal of a primary-side winding of the transformer. Another terminal of the second capacitor is connected to a second terminal of the primary-side winding of the transformer and the switch of the flyback converter. A terminal of the resistor is connected to a control terminal of the clamp switch. Another terminal of the resistor is connected to the second terminal of the primary-side winding of the transformer and the switch of the flyback converter.

Abstract: An apparatus for power conversion comprises a voltage transformation element, a regulating element, and a controller; wherein, a period of the voltage transformation element is equal to a product of a coefficient and a period of the regulating circuit, and wherein the coefficient is selected from a group consisting of a positive integer and a reciprocal of said integer.

Abstract: A voltage converter comprising a voltage input, a transformer comprising a primary winding coupled with the voltage input, a main switch coupled at a node with the primary winding, a snubber circuit coupled with the voltage input and with the node, the snubber circuit comprising a controllable switch having a gate and a source. A control circuit is coupled with the main switch and configured to turn the main switch on and off to convert an input voltage supplied to the voltage input to an output voltage distinct from the input voltage. The gate is coupled with the source to prevent the controllable switch from turning on.

Abstract: Isolated power supply control circuits, isolated power supply and control method thereof are disclosed, the control circuit for controlling an isolated power supply includes a secondary-side control signal generator and a primary-side control signal generator. The secondary-side control signal generator produces a secondary-side transistor switch control signal containing information about a turn-off instant of a secondary-side synchronous rectification transistor, which serves as a second turn-on instant. The primary-side control signal generator derives, from a feedback signal, a supposed turn-on instant for a primary-side transistor switch, which serves as a first turn-on instant. The primary side turn-on signal generator further derives a turn-on instant for the primary-side transistor switch from the second or first turn-on instant whichever is later and responsively generates a primary-side transistor switch control signal.

Abstract: Methods for operating an interleaved resonant power converter, and systems and apparatuses for power conversion. The method includes generating a first pair of complementary signals to drive a first stage of the interleaved resonant power converter. The method also includes generating a second pair of complementary signals to drive a second stage of the interleaved resonant power converter. The method further includes generating a current-mode control signal based on a current sense signal of the first stage. The method also includes adjusting a switching frequency of the first pair of complementary signals based on the current-mode control signal. The method further includes adjusting a switching frequency of the second pair of complementary signals to match the switching frequency of the first pair of complementary signals.

Abstract: A control circuit for controlling an output transistor for outputting power includes: a ramp terminal connected to a ramp resistance; a ramp waveform generation unit for generating a ramp waveform including a slope corresponding to a resistance value of the ramp resistance; an output control unit for controlling at least one of an ON time or an OFF time of the output transistor based on a comparison result between the ramp waveform and a comparison voltage; and a state detection unit for detecting a state of the ramp resistance connected to the ramp terminal, wherein the output control unit turns the output transistor to an OFF state regardless of the comparison result, when the state of the ramp resistance becomes a predetermined state.

Abstract: There is provided a power supply controller including: a monitor voltage generation part configured to generate a monitor voltage according to a primary voltage of a transformer that forms an insulated switching power supply; a sample/hold part configured to sample/hold the monitor voltage and output a feedback voltage; and a controller configured to turn on/off a primary current of the transformer by a fixed on-time method according to the feedback voltage, wherein the sample/hold part samples/holds the primary voltage at a plurality of different timings and outputs one of a plurality of hold values as the feedback voltage.

Abstract: A control circuit, a power supply including a control circuit, and a method are disclosed. The control circuit is configured to activate a second output capacitor connected in parallel with a first output capacitor of a power supply when the power supply is in a normal operating mode, and deactivate the second output capacitor when the power supply is in a standby mode.

Abstract: A wiring device including an interrupting device and a controller. The interrupting device electrically connecting one or more line terminals to one or more load terminals when the interrupting device is in a reset condition and disconnecting the line terminals from the load terminals when the interrupting device is in a tripped condition. The controller has an electronic processor and a memory. The controller is configured to monitor a current of the one or more line terminals, identify a presence of an in-rush condition, wherein an in-rush of the current exists when the one or more cycles of current conform with a decay progression envelope, and prevent the tripped condition upon identifying the in-rush condition.

Abstract: A voltage source converter (VSC) system of a high-voltage direct current (HVDC) system is disclosed. The system includes a number of line-commutated converter (LCC) transformers. Each LCC transformer is operable to transform alternate current (AC) voltage. A number of VSC converter units are connected in series and coupled to the plurality of LCC transformers. Each VSC converter unit is operable to convert between the AC voltage and direct current (DC) voltage. A bypass breaker is connected in parallel with at least one of the VSC converter units and operable to be closed to bypass the at least one VSC converter unit.

Abstract: An on-board charger (OBC) may include a power factor corrector PFC comprising a three phase active front end (AFE) connected to an AC electrical grid, and a DC/DC converter receiving a regulated DC voltage from the PFC and configured to charge a high voltage battery. The OBC may be configured to extract a power value which is equal to a reference maximum power extracted from a three phase electrical grid PMAX3?, from any type of AC electrical grid to which the OBC is connected, and may include three switches SW1, SW2 and SW3 and a diodes arm having diodes D1 and D2 connected in series between a high and low side of the AFE, whereby two switches SW1 and SW2 are arranged between the AFE and the AC electrical grid and are able to interrupt current flowing between phase arms of the three phase AFE, wherein the third switch SW3 is arranged on a line connecting the diodes arm and the AC electrical grid.

Abstract: A secondary side controller for a flyback converter includes an integrated circuit (IC), which in turn includes: a synchronous rectifier (SR) sense pin coupled to a drain of an SR transistor on a secondary side of the flyback converter; a capacitor having a first side coupled to the SR sense pin, the capacitor to charge or discharge responsive to a voltage sensed at the SR sense pin; a diode-connected transistor coupled between a second side of the capacitor and ground; a first current mirror coupled to the diode-connected transistor and configured to receive, as input current, a reference current from a variable current source; and a peak detect transistor coupled to the diode-connected transistor and to an output of the first current mirror. The peak detect transistor is to output a peak detection signal in response to detecting current from the capacitor drop below the reference current.