Abstract: An embodiment includes an apparatus comprising: first and second electrodes; first and second insulation layers between the first and second electrodes; and a middle layer between the first and second insulation layers; wherein (a) the middle layer includes material that has a first resistance when the first electrode is biased at a first voltage level and a second resistance when the first electrode is biased at a second voltage level; (b) the first resistance is less than the second resistance and the first voltage level is greater than the second voltage level. Other embodiments are described herein.
Type:
Grant
Filed:
March 31, 2016
Date of Patent:
November 3, 2020
Assignee:
Intel Corporation
Inventors:
Elijah V. Karpov, Prashant Majhi, Ravi Pillarisetty, Uday Shah, James S. Clarke