Abstract: Techniques of transmitting wireless communications involve generating orthogonal spreading codes for any number of user devices that are linear combinations of sinusoidal harmonics that match the frequencies within the spread bandwidth. Along these lines, prior to transmitting signals, processing circuitry may generate a set of initial code vectors that form an equiangular tight frame having small cross-correlations. From each of these rows, the processing circuitry produces a new spreading code vector using a code map that is a generalization of a discrete Fourier transform. The difference between the code map and a discrete Fourier transform is that the frequencies of the sinusoidal harmonics are chosen to match the particular frequencies within the spread bandwidth and differ from a center frequency by multiples of the original unspread bandwidth. Different transmitters may then modulate respective signals generated with different spreading code vectors.

Abstract: An intelligent cable is disclosed. The cable provides a connector and a metal core. The connector is pluggably coupled with an external apparatus and enclosing a circuit unit electrically connected to an external apparatus. The metal core is electrically connected to the circuit unit in the connector. The circuit unit includes a transmitter and a receiver. The transmitter receives input signals from the external apparatus and outputs a transmitted signal to the metal core. The receiver receives the transmitted signal from the metal core and provides output signals to the external apparatus. A feature of the cable is that the transmitter modulates the input signals and the receiver de-modulates the transmitted signal both by the PAM configuration.

Abstract: Blind modulation detection in a receiver of a wireless communication device calculates error energies for PSK and GMSK based on differences between a received training sequence signal and synthesized training signals generated from PSK and GMSK channel estimations and a known training sequence phase rotated by 3?/8 and ?/2 per symbol, respectively. A highly reliable modulation detection in a Single Antenna Interference Cancellation (SAIC) operational environment is achieved by a dual comparison of a total energy value of the received signal and the two error energies. PSK is determined if the PSK error energy value is found to be lower than both the GMSK error energy value and the total energy value by predetermined thresholds; otherwise the modulation type is determined to be GMSK.

Abstract: An impulse response is estimated for a channel by estimating an intermediate impulse response of the channel. The intermediate impulse response comprises at least one multipath spike and one or more non-deterministic noise components at locations throughout the channel Then, a threshold function is applied to the estimated intermediate impulse response across at least a portion of the channel in order to provide an estimated final impulse response of the channel. The threshold function has the effect of nulling the noise components of the channel having values less than the threshold function at the location within the channel of the respective noise component, and the threshold function is characterized by a level that varies across the portion of the channel from a minimum value to a maximum value in a manner determined by the location of the at least one multipath spike within the channel.

Abstract: The apparatus measures timing variations, such as the jitter or wander in a timing signal (100) of a telecommunications network. A recovered clock signal is sampled and digitized to produce a series of digital clock samples which are then processed (135) with reference to a local digital reference signal to produce digital baseband frequency in-phase (I) and quadrature (Q) components (165, 170) these being further processed (145) to produce the digital phase information of said clock signal to determine (175) the required parameters of the network. The step of digitally processing said clock samples with reference to a local reference signal can be conveniently and cheaply implemented using a digital signal down-converter IC (135), for example of a type existing for digital radio receiver implementations. For jitter measurement, the local reference signal may be generated by a phase-locked loop (as in FIG. 2). For wander measurements an external reference clock is used (as in FIG. 3).

Abstract: A canceling method and apparatus can achieve a fast communication by improving an S/N value by adaptively canceling a noise with respect to a frequency or band having a large noise by selecting noise canceling band in accordance with a condition of noise being generated. A reception signal contains a specific signal having a specified time position, amplitude and phase. A noise distribution of the specific signal is recognized so as to predict a noise by extracting a frequency band having a larger noise component from a pair of frequencies generated by the insertion of the specific signal. An original transmission signal is reproduced by canceling the predicted noise from the reception signal.

Abstract: A method and circuit to produce an optimal sampling phase for recovery of a digital signal is achieved. A digital signal is over-sampled by sampling on each phase of a multiple phase clock to generate a sample value per phase. The multiple phase clock may be generated by a DLL. A voted value is determined per phase comprising a majority value of a set of consecutive sample values. Transition phases are sensed. A transition phase is defined as two consecutive voted phases comprising different values. The transition phases are compared to a stored phase state to determine a signal shift direction. The signal shift direction is filtered to generate a state update signal. The stored phase state is updated based on the state update signal. The stored phase state corresponds to an optimal sampling phase for recovery of the digital signal.

Abstract: A phase detector customized for Clock Synthesis Unit (CSU) is disclosed. The phase detector improves jitter performance by providing minimal activity on VCO control lines and pushing ripple frequency to one octave higher, while maintaining wide linear characteristic. Moreover, it provides a frequency-scalable circuit that unlike a conventional phase-and-frequency detector (PFD), does not rely on asynchronous elements.

Abstract: The present invention includes path delay difference comparator 14 for receiving path delay amounts ?1 to ?K detected from a reception signal and extracting each pair of paths satisfying first condition (|?1??j|??th), de-spreaders 111 to 11K for performing de-spreading according to the path delay amounts, estimator 121 to 12K for estimating an SIR value every path, estimators 131 to 13K for estimating the carrier phase every path, phase difference comparator 15 for comparing the carrier phases ?1 to ?k of the paths of each pair satisfying the first condition and extracting each pair of paths satisfying second condition (|?1??j|??th), and comparator 16 for selecting one path having larger SIR from the paths of each pair extracted and using the SIR value of the selected path for SIR combining.

Abstract: An apparatus and method for processing data using the complex quadrature phase shift keying (CQPSK) is disclosed. The present invention includes plurality of multiplying units for multiplying a long pseudo noise (PN) code with an in-phase pseudo noise and quadrature pseudo noise, and a results of multiplying with a pilot channel, a dedicated control channel, a voice channel, a high-speed data transmission channel, a result multiplied with channels with gain, filtering units for eliminating noise, subtracting and adding units for calculating final result, and in-phase/quadrature channel outputting unit for outputting I-channel/Q-channel. The present invention can improve data processing speed of a radio channel, increase capacity of data processing in radio communication and also can be applicable to various kinds of radio communication devices transceiving voice, media contents and high-speed data at a same time.

Abstract: The receiver (1) for radio-frequency signals (SV1, SV2, SV3, SV4), modulated by specific codes of transmitting sources, such as satellites (S1, S2, S3, 54), includes receiving and shaping means with frequency conversion for the radio-frequency signals for generating intermediate signals, a correlation stage formed of several correlation channels for receiving the intermediate signals and microprocessor means connected to the correlation stage in order to process the extracted data after correlation. Each channel includes a correlator in which the intermediate signals are correlated with at least two early and late replicas of the specific code of a visible transmitting source to be searched and tracked. The correlator further includes integrator counters for the correlated signals to provide a first amplitude value of the auto-correlation function of the early signals and a second amplitude value for the late signals.

Abstract: In a data decision circuit: a clock generation unit generates a clock signal based on a phase difference signal so that the clock signal has an optimum phase with respect to a phase of an input data signal; a data determination unit determines data values carried by the input data signal, by using the clock signal; a phase-difference detection unit detects a rising-side phase difference and a falling-side phase difference, where the rising-side phase difference is a phase difference between a rising of the input data signal and a next transition in the clock signal, and the falling-side phase difference is a phase difference between the transition and a next falling of the input data signal; and a phase-difference-signal generation unit generates the phase difference signal so as to represent a difference between the rising-side phase difference and the falling-side phase difference.

Abstract: A sync mark detector identifies a sync mark in an incoming bitstream of a communications channel. A bit comparing circuit compares the sync mark bit-by-bit to the incoming bitstream if channel irregularities do not exist. A symbol comparing circuit compares the sync mark symbol-by-symbol to the incoming bitstream if channel irregularities do exist. The bit comparing circuit implements a bit level matching rule. The symbol comparing circuit implements a symbol level matching rule. The bit comparing circuit generates a sync mark found state when the bit level matching rule is satisfied. The symbol comparing circuit generates a sync mark found state when the symbol level matching rule is satisfied. Post coding such as NRZ, INRZI, or NRZI can be used.

Abstract: In a parallel signal transmission device for converting serial signals into parallel signals at a transmitting unit to be transmitted to a receiving unit, the transmitting unit generates serial code signals from periodically latched parallel signals besides transmitted parallel signals, and adjusts phases of the parallel signals to the serial code signals by delaying the parallel signals by a predetermined delay time; and the receiving unit changes over bits of the parallel signals from the transmitting unit based on recovered clocks, detects bit shift amounts of the parallel signals after bit changeover, and performs skew adjustments of the parallel signals depending on the bit shift amounts.

Abstract: During reception of a training signal in a received signal R(n) an estimated impulse response value Hm(n) of an M-channel, and a tap coefficient G(n) of a linear filter 111 is calculated by an adaptive algorithm through the use of the received signal R(n) and the training signal b(n). For an information symbol of the received signal R(n), the received signal R(n) is subjected to linear filtering with the most recently calculated tap coefficient G(n), and the linear filtering output Z(n) and the most recently estimated impulse response value Hm(n) are used to calculate a soft decision value ?1. In the second and subsequent rounds of equalization, the likelihood b?(n) of a soft decision value ?2[b(n)] from a decoder is calculated, and a replica is generated by linear-filtering the likelihood b?(n) with an estimated impulse response value vector HL(n) obtained by approximating intersymbol interference with the current code b(n) to zero.

Abstract: A method and apparatus for extending the dynamic range of an integer or fixed-point Fast Fourier Transform (“FFT”) system that may be used in communications devices such as ADSL modems. The disclosed FFT system utilizes a shift control module to increase the effective dynamic range of the FFT implementation by selectively choosing at least one stage of an FFT butterfly implementation in which the outputs of the butterfly stage are not divided to otherwise avoid overflow problems.

Abstract: A digital VSB transmission system in disclosed. The system is compatible with the existing ATSC 8T-VSB receiver and able to transmit additional supplemental data as well as MPEG image/sound data. It initially encodes the information bit of the supplemental data with a ½ encoding rate in order to produce a parity bit and sends the parity bit together with the information bit. Therefore, both of the MPEG image/sound data and the supplemental data can be transmitted properly even through a channel having a high ghost and/or noise level. Particularly, it can significantly improve performances of the slicer predictor and trellis decoder of the VSB receiver.

Abstract: A method of information transmission from an interrogator system to portable objects. The information is transmitted through ternary amplitude modulation and positional pulse coding. A frame is made up of a Start Of Frame (SOF) marker made up of two like-polarity pulses, patterns that transmit binary symbols and are composed of two opposite-polarity pulses, and lastly an End Of Frame (EOF) marker that is made up only of a single pulse. The present invention is notably intended for interrogating radio frequency (RFID) tags.