Patents Examined by G. Wan
  • Patent number: 4551685
    Abstract: The disclosed invention is a programmable gain feedback amplifier consisting of a high gain (op-amp) amplifier, feedback elements and fuse networks in the feedback and/or input paths, a decoding circuit for receiving an input programming command signal, and thereby selectively blowing (or opening) the proper fuses to establish the desired signal attenuation in said networks. After programming, the gain of the amplifier circuit is related to the total attenuation of the network(s), is permanently set, and does not require the programming signal to be continuously applied. Embodiments are described which are compatible with monolithic microelectronic fabrication techniques.
    Type: Grant
    Filed: October 25, 1982
    Date of Patent: November 5, 1985
    Inventors: David V. Kerns, Jr., David V. Kerns
  • Patent number: 4551688
    Abstract: There is disclosed a delay compensated automatic gain control which allows improved automatic gain control in analog and digitally implemented systems. The AGC system and technique includes a primary high speed control loop implemented after the intermediate frequency filtering and a secondary loop which controls the radio frequency gain prior to the intermediate frequency filter without affecting the overall response of the automatic gain control system. The resulting action of the two loops provides an automatic gain control for the radio frequency and intermediate frequency stages in both analog and digitally implemented systems without sacrificing speed of response or stability of the systems.
    Type: Grant
    Filed: May 23, 1984
    Date of Patent: November 5, 1985
    Assignee: Rockwell International Corporation
    Inventor: Robert L. Craiglow
  • Patent number: 4550290
    Abstract: An FET linear power amplifying apparatus with an FET power amplifier and a distortion generator which produces a distortion signal indicative of a distortion component having the same amplitude and inverted phase as those of a distortion component produced by the FET power amplifier. The amplitude and the phase of the distortion signal are controlled in accordance with a control signal which depends upon the magnitude ratio of the input and output signals of the apparatus. The distortion component which will be produced by the FET power amplifier is compensated by the controlled distortion signal.
    Type: Grant
    Filed: July 18, 1984
    Date of Patent: October 29, 1985
    Assignee: Fujitsu Limited
    Inventor: Hiroshi Igarashi
  • Patent number: 4549145
    Abstract: A switching amplifier is described which is intended in particular for sample-and-hold circuits. The switching amplifier has an output stage (T.sub.1, T.sub.2) of the npn-npn-type comprising two output transistors (T.sub.1, T.sub.2) in series. The output (4) is connected to the emitter of a first one (T.sub.1) of the two output transistors (T.sub.1, T.sub.2) and to the collector of the second output transistor (T.sub.2), a diode (T.sub.3) being arranged between the output (4) and this collector. The output (4) can be switched off by switching the voltage on the base of the first transistor (T.sub.1) and the voltage on the point between the diode (T.sub.3) and the collector of the second transistor (T.sub.2) relative to the output voltage, a third transistor (T.sub.4) ensuring that in this situation the collector current of the second transistor (T.sub.2) can be drained when said diode (T.sub.3) is turned off, so that initially said second transistor (T.sub.2) can remain conductive.
    Type: Grant
    Filed: September 29, 1983
    Date of Patent: October 22, 1985
    Assignee: U.S. Philips Corporation
    Inventor: Rudy J. van de Plassche
  • Patent number: 4547740
    Abstract: A monitoring device in integrated drive amplifiers intended to be driven by digital signals includes fault detection circuits giving a fault signal for such as excess temperature, overcurrent, or interruption and shortcircuiting in the load circuit. The input of the drive amplifier is connected to the output of a D-type flipflop (13) having a data input (D) and a clock input (C) intended for connection to a digital control system. Between the data input (D) and a potential corresponding to a logical ZERO there is connected a circuit (22,23) adapted for connecting the data input (D) to said potential during the interval between the operation signals when a fault signal is present.
    Type: Grant
    Filed: March 28, 1984
    Date of Patent: October 15, 1985
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventor: Kurt A. I. Nilsson
  • Patent number: 4547745
    Abstract: A power combiner has been described incorporating N transmission lines each having a quarter wavelength or multiple thereof for a frequency within a predetermined frequency range where the input of each transmission line has a resistor coupled thereto with the other ends of the resistors coupled together using inductance and capacitance to compensate for the distances between the resistors to provide a floating node which is low impedance in the predetermined frequency range. A composite amplifier is described on gallium arsenide wherein a power divider and power combiner are coupled to a plurality of MESFET's and wherein each input and output of the power combiner and power divider have a resistive load with respect to the MESFET while including a matching circuit and wherein each input of the combiner has a resistor coupled to a first floating node and each output of the divider has a resistor coupled to a second floating node.
    Type: Grant
    Filed: February 28, 1983
    Date of Patent: October 15, 1985
    Assignee: Westinghouse Electric Corp.
    Inventors: Ronald G. Freitag, James E. Degenford, Daniel C. Boire
  • Patent number: 4547744
    Abstract: An integrated amplifier arrangement in which the d.c. voltage gain is suppressed, which includes two transistors arranged as a differential pair with an output between the collectors of these transistors. In order to improve the high-frequency properties of the amplifier arrangement, the collector circuit of the transistors includes two load transistors in cascade with the two transistors arranged as a differential pair, each load transistor including an impedance in its base circuit in order to obtain an inductive input impedance on the emitter side of the transistor. In order to obtain direct-current and low-frequency negative feedback for eliminating the d.c. gain, the base electrodes are cross-coupled to the collector electrodes of the load transistors.
    Type: Grant
    Filed: May 28, 1981
    Date of Patent: October 15, 1985
    Assignee: U.S. Philips Corporation
    Inventor: Wolfdietrich G. Kasperkovitz
  • Patent number: 4546325
    Abstract: A cylinder or barrel fitted with cams is used to limit the outward movement of spring-loaded plungers attached to cavity shorting bars in a klystron. Different tunings of the klystron are achieved by rotating the cylinder so that different rows of cams limit the plungers. A linear solenoid is used to decouple the plungers from the cams before rotation. A stepping solenoid is used to move the cylinder from one setting to another.
    Type: Grant
    Filed: September 28, 1984
    Date of Patent: October 8, 1985
    Assignee: Varian Associates, Inc.
    Inventors: Carol J. Thiem, Gordon R. Lavering, Gerald A. Valier
  • Patent number: 4544896
    Abstract: An amplitude-adjusting circuit used for a contrast-adjusting circuit of resistor division type in which a video signal is applied across a pair of series-connected resistors and an output is produced from the junction point of the two resistors. At least one of the resistors is used as a variable resistor. The amplitude-adjusting circuit comprises a current source for supplying a constant current steadily between the terminals of the variable resistor, a high-gain amplifier for controlling the resistance value of the variable resistor, and a filter for separating the video signal component from the change of the value of the variable resistor represented by a voltage change, and introducing the resistance change to the high-gain differential amplifier.
    Type: Grant
    Filed: March 11, 1985
    Date of Patent: October 1, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Michitaka Osawa, Etuo Funada, Hiroyuki Miyajima, Hitoshi Maekawa, Kunio Ando
  • Patent number: 4544895
    Abstract: An asymmetrically driven audio amplifier arrangement comprises two amplifiers (1, 10) whose outputs (3, 12) are each connected to a common capacitor (18) via an associated loudspeaker (7, 16). The amplifier circuits (1, 10) are driven in phase opposition, so that the signal current through said common blocking capacitor becomes substantially zero. In addition, it is possible to replace the two loudspeakers by one loudspeaker of a higher power between the outputs (3, 12) of the two amplifiers (1, 10).
    Type: Grant
    Filed: August 22, 1983
    Date of Patent: October 1, 1985
    Assignee: U.S. Philips Corporation
    Inventor: Albert Stoker
  • Patent number: 4543539
    Abstract: An amplifier comprises an amplifier circuit for amplifying an input signal and a supply voltage detector for controlling the operation of the amplifier circuit. The supply voltage detector has hysteresis characteristics as to a first threshold voltage and a second threshold voltage which are different from each other in order to detect the magnitudes of the supply voltage. The amplifying operation of the amplifier circuit is controlled as to the start-up and turn-off operation thereof by an output signal of the supply voltage detector.
    Type: Grant
    Filed: August 17, 1983
    Date of Patent: September 24, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Kunio Seki, Ritsuji Takeshita
  • Patent number: 4543533
    Abstract: The parametric amplifier includes plurality of parameter changing or exciting regions provided in a periodic array on a wave propagation medium having the property that waves having different frequencies travel through the medium at different velocities, so as to cause a parametric action only when a wave applied to the amplifier satisfies a predetermined condition relative to the dispersive nature of the medium.
    Type: Grant
    Filed: August 30, 1983
    Date of Patent: September 24, 1985
    Assignee: Clarion Co., Ltd.
    Inventors: Shoichi Minagawa, Takeshi Okamoto
  • Patent number: 4543538
    Abstract: An amplifier circuit having first, second and third inputs and first and second input impedance elements connected respectively to the first and second inputs, a first differential stage connected between the first and second input impedance elements, first and second output stages connected to the differential stage outputs, the first and second output stages produce complementary voltage output signals on respective first and second outputs, first and second cross-coupled differential feedback loops linking the first output to the second input of the first differential stage and the second output to the first input of the first differential stage, the first and second outputs are linked to each other by a voltage divider circuit the midpoint of which is connected to one input of a second differential stage, the third input being the other input of the second differential stage, the output of the second differential amplifier causing a change in a current repeater circuit which in turn causes a change in the
    Type: Grant
    Filed: July 16, 1984
    Date of Patent: September 24, 1985
    Assignee: Lenco, Inc.
    Inventor: Richard D. Fay
  • Patent number: 4543535
    Abstract: A distributed power amplifier includes a plurality of field effect transistors (FETS), each one of such FETS having gate, drain and source electrodes, such FETS having cascaded gate electrodes and cascaded drain electrodes successively coupled between an input terminal and an output terminal. The gate electrode of each one of the successively coupled FETS is coupled to the input terminal through a corresponding one of a plurality of capacitors, and a common bias source through one of a corresponding plurality of high impedance bias paths. Since the gate electrodes of each FET are coupled to the input terminal through a capacitor, the coupling capacitor in combination with the inherent capacitance of each FET provides a potential divider into each gate electrode. Therefore, the power fed to each gate electrode is selected by selecting the value of capacitance for the coupling capacitors.
    Type: Grant
    Filed: April 16, 1984
    Date of Patent: September 24, 1985
    Assignee: Raytheon Company
    Inventor: Yalcin Ayasli
  • Patent number: 4543537
    Abstract: For processing a signal applied to an input of audio signal processing devices, for example a speech signal received via a microphone (2) in a speaker-identification or speech recognition system, the signal must have a specific level. For this purpose the signal is applied via an amplifier (4) with variable gain. Before processing begins, the gain is set to an initial value. During processing of the speech signal, it is checked, at regular time intervals, in which range of a plurality of predetermined amplitude ranges the amplified signal is situated, and whether overloading takes place and the frequency which the amplitude of the signal occurs in each of the amplitude ranges is counted. When the signal ends, the optimum gain setting is determined from the histogram of frequencies.
    Type: Grant
    Filed: April 23, 1984
    Date of Patent: September 24, 1985
    Assignee: U.S. Philips Corporation
    Inventors: Michael H. Kuhn, Herbert Piotrowski, Rudolf Geppert
  • Patent number: 4542350
    Abstract: A monolithic integrated circuit device is formed on a substrate and made up of an AC negative feedback circuit for a high frequency amplifier circuit. The AC negative feedback circuit includes a semiconductor impedance element and connected to an external terminal on the substrate, and variable control means for adjusting an amount of the AC feedback of the high frequency amplifier circuit. As the semiconductor impedance element is used the junction capacitance of a diode under negative bias, diffusion capacitance between the base and emitter electrodes or between the base and collector electrodes of a transistor or a differentiated resistance of a diode.
    Type: Grant
    Filed: July 19, 1983
    Date of Patent: September 17, 1985
    Assignee: Nippon Telegraph & Telephone Public Corporation
    Inventors: Yukio Akazawa, Noboru Ishihara, Mamoru Ohara
  • Patent number: 4542349
    Abstract: A digital control amplifier is provided as a unitary monolithic device to control the transfer function of an analog signal in response to a digital control, such as from a digital computer. A current transfer cell is employed which uses an amplifier circuit having transistors of like polarity, and is capable of both attenuation and greater than unity amplification of an input analog signal. A digital-two-analog converter is integrated into the system and employs a series of current dividers which enables a common reference current to be used for each bit of the converter. A current reference circuit for the converter employs a band gap voltage regulator with a temperature compensation design that varies the control signal applied to the current transfer cell to compensate for temperature-induced variations in the output of the cell.
    Type: Grant
    Filed: February 10, 1984
    Date of Patent: September 17, 1985
    Assignee: Precision Monolithics, Inc.
    Inventor: Werner H. Hoeft
  • Patent number: 4540954
    Abstract: A broadband distributed amplifier capable of amplifying frequencies from zero to 20 Gigahertz is disclosed having a singly terminated output. The singly terminated construction of the amplifier precludes the need for a termination resistor on the output and thereby enables substantially all of the output power to be utilized.
    Type: Grant
    Filed: November 24, 1982
    Date of Patent: September 10, 1985
    Assignee: Rockwell International Corporation
    Inventor: Thomas R. Apel
  • Patent number: 4540953
    Abstract: A gain control circuit is disclosed. In accordance with the preferred embodiment of the invention, a negative feedback amplifier is connected between a reference voltage and a variable impedance circuit which controls the voltage to the input of a signal amplifier whose output defines the desired output voltage. The variable impedance circuit varies the input voltage to the signal amplifier as a function of the level of the output voltage appearing at the output of the signal amplifier. The output impedance of the negative feedback amplifier is chosen such that an A.C. signal appearing at its output end can be sufficiently attenuated. As a result, the input impedance to the variable impedance circuit is negligibly small with respect to an A.C. signal. As a result, the amplitude of the input signal is varied over a wide range in response to the impedance of the variable impedance circuit.
    Type: Grant
    Filed: February 28, 1983
    Date of Patent: September 10, 1985
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Hisashi Togari, Shinji Miyata
  • Patent number: 4540952
    Abstract: A nonintegrating, high sensitivity, wide dynamic range receiver is described. A voltage dependent current source is connected in negative feedback with a forward voltage amplifier. The transconductance of the current source is essentially independent of frequency within the signal bandwidth frequency, and the feedback pole is the dominant pole in the loop gain. To prevent saturation by high intensity input signals the receiver is combined with a range extender circuit.
    Type: Grant
    Filed: September 8, 1981
    Date of Patent: September 10, 1985
    Assignee: AT&T Bell Laboratories
    Inventor: Gareth F. Williams