Abstract: An integrated circuit microprocessor includes storage means coupled to a control unit for receiving from the control unit information regarding how the next bus cycle is to be run. Upon receipt of a bus error signal from a peripheral device, the storage means is reset. If, however, a halt signal accompanies the bus error signal, the storage means is not reset and the bus cycle is rerun when the halt signal terminates.

Abstract: A device for use with a digital computer for storing standard software used by the computer and modifying the address portions of the standard software prior to transmission to the computer. The device includes a ROM package containing a ROM within which is stored a standard software subprogram written assuming it is stored at an absolute location in the computer's memory other than its actual location in the computer's memory system. Also included in the ROM package is a base register which can be loaded, under control of the operating system software, with an offset value reflecting the difference between the actual starting memory system location of the subprogram stored in the ROM and the assumed absolute starting location of the subprogram. Each ROM word includes an extra bit to indicate whether the corresponding data word contains an address requiring relocation. As a word is read out of ROM, a gating circuit tests whether an address relocation is required.