Abstract: The first (T.sub.1) and the second (T.sub.2) output transistor of an amplifier arrangement are push-pull driven by means of a drive circuit (10) having two transistors (T.sub.11, T.sub.12) which are each loaded by a current source (T.sub.13, T.sub.14). Currents which are a measure of the currents flowing through the first (T.sub.1) and the second (T.sub.2) output transistor are generated by first (20) and second (30) current measuring means. These currents are applied to a control circuit (40) which controls the current intensity of the current sources (T.sub.13, T.sub.14) in such a way that the harmonic mean value of the currents flowing through the first (T.sub.1) and the second (T.sub.2) output transistor is substantially equal to a reference value.

Abstract: An amplifier of the type having a differential input stage driving an active load which produces a single-ended output directed to a voltage-gain stage. The gain of the amplifier is isolated from the effects of load changes by a biasing circuit which forces the differential input stage to remain balanced at all times.

Abstract: The present invention pertains to an orthopedic device for immobilizing an appendage of a patient. The orthopedic device includes a linkage and a first member fixedly secured to the linkage. The first member has a side and an open region defined in the side. The orthopedic device also includes a second member which is slidingly secured to the linkage. The second member is capable of sliding along the linkage to be positioned adjacent the first member. The second member has a first side and a first open region defined in the first side. The first open region of the second member communicates with the open region of the first member when the second member is adjacent to the first member such that the first and second members are capable of being positioned about the appendage through the open regions of the first and second members.

Abstract: A switchable gain circuit includes an operational amplifier (10) which has an input leg comprised of a series resistor (20) and an MOS transistor (22). A plurality of feedback legs are formed, each comprising one or more resistors that are equal in value to the input resistor (20), and connected in series with a switch transistor. The proportion of the series resistance of the transistor in a given feedback leg to the series resistance in the transistor in the input leg is equal to the proportion of the fixed resistance in the feedback leg and input leg. The value of the series resistance of the feedback transistors therefore factors out the series resistance of the input transistor (22) in the gain calculation. This significantly reduces harmonic distortion in the output signal.

Abstract: Disclosed is a differential amplifier circuit which includes a first NPN transistor, a second NPN transistor, a current source connected to the emitters of the first and second NPN transistors, a first PNP load transistor having a collector connected to the collector of the first NPN transistor, a second PNP load transistor having a collector coupled to the collector of the second NPN transistor, and an FET having a gate connected to the collector of the first NPN transistor, and a source connected to the bases of the first and second PNP load transistors. A DC input current of the FET is substantially zero, and is designed to absorb a current corresponding to the gate potential of the FET, from the bases of the first and second PNP load transistors.

Abstract: A wide band low noise amplifier for metric waves, including a transistor connected by its emitter to the ground of the amplifier through two secondary windings, connected in series, of a first and second transformer, and coupled between its base and its emitter by the primary winding of the first transformer, one end of the primary winding of the second transformer being connected to the collector of the transistor, the output signal of the amplifier being taken from all or part of the primary of the second transformer and the number of turns of the secondaries of the transformers being very low so as to limit the leak inductance, which amplifier further comprises a first resistor connected in series with the two secondary windings and a second resistor connected between the output of the amplifier and the transistor base.

Abstract: A third-order all-pass network for a delay circuit is formed by four coupled transconductors (G.sub.10 to G.sub.13) which are each represented by two transistors whose bases constitute the inputs and whose collectors constitute the outputs of the transconductor. A first input of these transconductors (G.sub.10 to G.sub.13) is connected to ground (3). Between the second inputs (25,26) of the first transconductor (G.sub.10) and the second transconductor (G.sub.11) a first capacitor (C.sub.1) is arranged, while between the second imputs (26,27) of the second transconductor (G.sub.11) and the third transconductor (G.sub.12) a second capacitor (C2) is arranged, and between the second inputs (27,28) of the third transconductor (G.sub.12) and the fourth transconductor (G.sub.13) a third capacitor (C3) is arranged. Further, a fourth capacitor (C4) is arranged between the second inputs (25,27) of the first transconductor (G.sub.10) and the third transconductor (G.sub.

Abstract: The invention relates to a holding device for the stack of paper, cardboard or similar sheet-form punching material on a punch press, with a centering pin yielding elastically at least in zones under the thrust of the punching material for engagement into centering holes of the punching material sheets. For the improvement of such a holding device, according to the invention the centering pin, preferably rigid in itself, with smooth or substantially smooth surface, is suspended both tilting and also movable thrusting in or parallel to the plane of the punching table perpendicularly and parallel to the stack edge.

Abstract: A high input impedance differential amplification circuit using two operational amplifiers with the input signals coupled to respective ones of the inverting input of one amplifier and the non-inverting input of the other, and with resistance networks of pre-set value relationships coupling the other amplifier inputs and their outputs.

Abstract: A slab-type optical device comprising a pair of single mode waveguides equal in phase constant and intersecting each other each at its one end and a pair of single mode waveguides different in phase constant and intersecting each other each at its one end. The pairs of waveguides are joined to each other at their intersections. The angle of intersection of the two waveguides in each pair is set to such a small value that when light propagates along the waveguide a very small distance, the variation in the spacing between the waveguides is negligible relative to the distance of propagation.

Abstract: An AGC system for controlling the gain of an amplifier includes an AGC multiplexer and an AGC circuit. The AGC circuit receives an input signal from the AGC multiplexer and generates, in response thereto a gain control signal. The AGC multiplexer operates in three modes. In a first mode, in which the erased portion of a sector is being detected, the AGC multiplexer couples an input preset signal of a predetermined voltage level to the AGC circuit, enabling it, in turn, to generate a gain control signal to control the gain to a predetermined level. In a second mode, the AGC multiplexer couples a signal related to the output signal from the amplifier to the AGC circuit, enabling the AGC circuit to generate a gain signal related to the output level of the amplifier. In the third mode, the AGC multiplexer maintains its output signal constant, thus enabling the AGC circuit to maintain its gain control constant.

Abstract: The amplification circuit comprises an operational amplifier and two groups of capacitances in input and feedback association with the operational amplifier. 2-phase switching means are periodically switched between a position in which two other capacitance groups are charged at output voltage values equal but opposite in sign and a position in which said other capacitances cancel each other out.

Abstract: A variable frequency characteristic circuit to be used in compensating the frequency characteristics in an audio device in a vehicle. A single operational amplifier is used. Different resonance circuits of different frequencies are connected from ground to either the inverting or non-inverting inputs in order to provide local peaks and dips. Two variable resistors are connected in parallel between the inverting and non-inverting inputs. Different resonance circuits of different frequencies are connected from ground to center taps of the variable resistors to provide treble and base control.

Abstract: The stability of an amplifier output stage in driving a capacitive load and sinking increasing currents is enhanced by compensating for a reduction in V.sub.BE of a first emitter follower bipolar transistor connected to the amplifier output. This is accomplished by using a second emitter follower transistor with the two emitter follower transistors driving a differential amplifier with the output of the differential amplifier controlling the conductance of a sink MOS transistor connected to the amplifier output. Another MOS transistor is serially connected with the second emitter follower transistor with the gate terminal connected to the differential amplifier output whereby an increasing sinking current causes an increase in current through the second emitter follower transistor and an increase of V.sub.BE of the transistor, thereby increasing V.sub.BE of the first emitter follower transistor.

Abstract: An output stage with automatic level control for power line signalling, including a controlled amplifier (F.sub.1) and a feedback circuit for sensing the output voltage (V.sub.0 +V.sub.0) of the output stage and for supplying a control signal (v.sub.4) to a control input of the controlled amplifier (F.sub.1). The feedback circuit includes a comparator (K) for comparing an alternating voltage (v.sub.1) which is responsive to the alternating voltage component (v.sub.0) at the output stage and which is furthermore superposed on a first direct voltage (V.sub.1) with a second direct voltage (V.sub.2). As control signal to the controlled amplifier (F.sub.1) there is utilized the voltage (v.sub.4) across the capacitor (C.sub.4), the voltage of which increases or decreases in response to the comparison result of the comparator (K).

Abstract: A precision gain circuit arrangement for amplifying analog type signals is fabricated on an integrated chip with digital devices in a CMOS process. The circuit arrangement includes a high gain operational amplifier with a series connected pair of FET devices setting a reference voltage (V.sub.ref) at the inverting input of the operational amplifier and a feedback circuit including a parallel connected pair of FET devices and a biasing FET for said pair set the gain of said circuit arrangement.

Abstract: A variable input voltage is periodically introduced in first time periods to an amplifier such as a differential amplifier to obtain an output from the amplifier. The amplifier may receive a reference voltage at one input terminal and the input voltage at a second input terminal in the first time periods. The input to the amplifier is periodically shorted in second time periods alternating with the first time periods so that the reference voltage is applied to both input terminals. Any offset voltage from the amplifier in the second time period may be converted to a binary signal to indicate the polarity of the offset voltage. The binary signal may be introduced to a storage member such as a capacitance. The capacitance accumulates energy in accordance with the characteristics of the binary signal in successive ones of the second time periods. The energy in the capacitance is introduced to the output terminals of the amplifier in a direction to compensate for the offset voltage in the amplifier.

Abstract: In a semiconductor device wherein a signal transmission in a semiconductor integrated electronic circuit is carried out partly or entirely by means of a light, the signal transmission on the light is carried out with multi-wavelength, waveguides or a photoelectric converter and an electronic integrated device are provided on a circuit board having an optical waveguide, thus providing a high performance and practical technique.

Abstract: A system for automatically controlling the gain-bandwidth product of operational amplifiers, wherein a gain-bandwidth product (G*B) of one of the amplifiers placed on the same chip as the amplifiers to be controlled is measured and the resulting signal is used to control through a bias circuit, the gain-bandwidth products of all the amplifiers, the value of these products being presettable by the frequeny of a control signal sent to the system input. The reference amplifier is highly compensated in the configuration of voltage follower.

Abstract: In a noise reducer for microwave amplifiers working by pulses, a small portion of the amplifier output signal is diverted through an ancillary channel. The amplitude of the pulses of this diverted signal is greatly reduced by a limiter. The noise between the pulses can then be processed in an amplifying circuit and in a phase-shifting circuit so that, by combining the main signal in a second coupler, the noise between the pulses is eliminated. This invention can be applied to transmission amplifiers forming part of a transmission/reception set where reception takes place between the transmission pulses.