Patents Examined by Geoffrey H Ida
  • Patent number: 11108015
    Abstract: Provided is a long-life organic electroluminescent illumination panel which is flexible and, even when a load is applied by bending, impact or vibration, can suppress the occurrence of defects in an electrode layer and an organic layer containing an organic electroluminescent material, and which can suppress the occurrence of dark spots due to short circuiting. This organic electroluminescent illumination panel includes: a pair of electrode layers, at least one of which is transparent, between a flexible film substrate and a flexible film sealing material, at least one of which is transparent; and an organic layer containing an organic electroluminescent material which is sandwiched between the pair of electrode layers. This organic electroluminescent illumination panel has multiple spacers which are disposed on an electrode layer laminated on the flexible film substrate so as to pass through the organic layer and another electrode layer.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: August 31, 2021
    Assignee: HotaluX, Ltd.
    Inventor: Yoshikazu Sakaguchi
  • Patent number: 11091365
    Abstract: The present disclosure provides a package structure and a manufacturing method. The package structure includes a substrate, a cover, a conductive pattern, and a sensing component. The cover is disposed on the substrate. The cover and the substrate define an accommodation space. The conductive pattern includes a conductive line. The conductive line is disposed on an internal surface of the cover exposed by the accommodation space, and is electrically connected to the substrate. The sensing component is disposed on the internal surface of the cover, and is electrically connected to the conductive line.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: August 17, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ching-Han Huang, Lu-Ming Lai
  • Patent number: 11036090
    Abstract: Embodiments of the present disclosure provide an array substrate and a manufacturing method thereof, and a display device. The array substrate has a display region and a wiring region located on a periphery of the display region. The array substrate includes a base substrate, and a transparent conductive strip and a wire formed on the base substrate in the wiring region; the transparent conductive strip and the wire are located in different layers and are in direct contact with each other, and the wire has one or more exposure holes formed therein.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: June 15, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xiaoyuan Wang, Wu Wang, Rui Wang, Yajie Bai, Zhuo Xu
  • Patent number: 11018323
    Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a first substrate, an insulating layer disposed over the first substrate and including a first inclined portion and a first electrode disposed over the insulating layer. The OLED display also includes a light-emitting element layer disposed over the first electrode, a second electrode disposed over the light-emitting element layer and a color conversion layer and a transmissive layer disposed over the second electrode. The first electrode includes a second inclined portion disposed over and inclined along the first inclined portion of the insulating layer.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: May 25, 2021
    Assignee: Samsung Display Co., Ltd.
    Inventors: Baek Hee Lee, Min Ki Nam, Hae Il Park
  • Patent number: 11011443
    Abstract: At the time of clamping, excessive stress is applied to bonding parts between substrates and input/output terminals, which may cause the bonding parts to be detached and cause the substrates to be cracked. A lower electrode of a power semiconductor element 11 is connected via a bonding material 13 to a first interconnection layer 12 arranged on a lower surface of the power semiconductor element 11, and an upper electrode 14 of the power semiconductor element 11 is connected via the bonding material 13 to a second interconnection layer 15 arranged on an upper surface. Also, a second main terminal 16 electrically connected to the upper electrode 14 of the power semiconductor element 11 is connected via the bonding material 13 to the second interconnection layer 15 and contacts and is positioned on a third interconnection layer 24 (spacer) arranged to be parallel to the first interconnection layer 12 on the lower surface.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: May 18, 2021
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Tokihito Suwa, Seiji Funaba
  • Patent number: 11011705
    Abstract: A pixel defining layer is disclosed including a display area and a non-display area located at a periphery of the display area, wherein the display area includes pixel units, and the non-display area includes dummy pixel units arranged outside one or more corners of the display area. A display panel, a display device, a method of fabricating a pixel defining layer, and a method of fabricating the display panel are also disclosed.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: May 18, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Wenjun Hou
  • Patent number: 11005059
    Abstract: Disclosed is an organic light emitting display device. The organic light emitting display device includes a first electrode on the first pixel and the second pixel, a hole transport layer on the first electrode, a first emission layer on the hole transport layer in correspondence with the first pixel, a second emission layer on the hole transport layer in correspondence with the second pixel, an exciton confinement layer on the first emission layer and the second emission layer, and a second electrode on the exciton confinement layer. The second emission layer includes a mixed host and an electron-type host.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: May 11, 2021
    Assignee: LG Display Co., Ltd.
    Inventor: HeuiDong Lee
  • Patent number: 10950739
    Abstract: A photodiode which includes a core of a first waveguide that terminates in a tapered termination that extends above a core, made of germanium or of SiGe, of a second waveguide, a matching strip that extends opposite the tapered termination on one side and opposite the core of the second waveguide on the opposite side, this matching strip being coupled optically to the core of the second waveguide by an evanescent coupling and including a first zone inside which its effective propagation index is equal to the effective propagation index of a second zone of the tapered termination, these first and second zones optically coupling the tapered termination to the matching strip through a modal coupling, and a low-index layer that extends between the matching strip and the tapered termination.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: March 16, 2021
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Karim Hassan, Salim Boutami, Christophe Kopp
  • Patent number: 10950822
    Abstract: A display device is provided that can increase brightness by improving light extraction efficiency. The display device can include a thin-film transistor disposed on a substrate, a first overcoat layer disposed on the thin-film transistor and including a groove portion, a reflective layer disposed on the first overcoat layer including the inside of the groove portion, a color filter disposed on the reflective layer and located in the groove portion, a second overcoat layer disposed on the color filter and the reflective layer, a first electrode disposed on the second overcoat layer and connected to the thin-film transistor, a bank layer disposed on the first electrode and including an open portion exposing the first electrode, an organic layer disposed on the bank layer and the first electrode, and a second electrode disposed on the organic film layer.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: March 16, 2021
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Kiseob Shin, Hyoungsu Kim, Doohyun Yoon
  • Patent number: 10903395
    Abstract: A light emitting structure that includes: first and second semiconductor layers having aluminum; and an active layer having aluminum between the first and the second semiconductor layers, the intensity exhibited in the second semiconductor layer range between a first minimum intensity of the secondary ions and a first maximum intensity of the secondary ions, and the intensity exhibited in the first semiconductor layer include a second minimum intensity of the secondary ions, the second minimum intensity being different from the first minimum intensity, and at a first prescribed distance from a surface of the second semiconductor layer, the second semiconductor layer exhibits a first intermediate intensity of the secondary ions corresponding to the second minimum intensity, which is between the first minimum intensity and the first maximum intensity, wherein the first maximum intensity occurs at a second prescribed distance from the first prescribed distance, wherein a ratio of the second prescribed distance (
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: January 26, 2021
    Assignee: LG Innotek Co., Ltd.
    Inventors: Byeong Jo Kim, Rak Jun Choi, Hyun Jee Oh
  • Patent number: 10872927
    Abstract: An image sensor includes an insulating pattern disposed on a semiconductor substrate and having an opening, a color filter disposed within the opening of the insulating pattern, a capping insulating layer disposed on the color filter, a first electrode disposed on the capping insulating layer and having a portion overlapping with the color filter, a separation structure surrounding a side surface of the first electrode, and a photoelectric layer disposed on the first electrode. The separation structure includes a first insulating layer and a second insulating layer formed of different material.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: December 22, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Changhwa Kim, Sejung Park, Junghun Kim, Sangsu Park, Kyungrae Byun, Beom Suk Lee
  • Patent number: 10862071
    Abstract: A display device includes: a substrate; a display unit on the substrate; a first inorganic layer on the display unit; a first organic layer on an upper portion of the first inorganic layer; a first dam at an edge of the first organic layer; a second dam spaced from the first dam and at an outer area of the first dam with respect to the display unit; and a stress relieving layer between the first dam and the second dam.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: December 8, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seungwook Chang, Mugyeom Kim, Heechang Park, Younghee Lee
  • Patent number: 10854753
    Abstract: A semiconductor device includes a substrate, a fin region including fins formed from the substrate, at least one fin cut region formed in the substrate adjacent to the fin region and having a different depth in the substrate than the fin region, and shallow trench isolation regions having substantially a same height in the fin cut regions and the fin region.
    Type: Grant
    Filed: January 2, 2019
    Date of Patent: December 1, 2020
    Assignee: Tessera, Inc.
    Inventors: Kangguo Cheng, Peng Xu
  • Patent number: 10850977
    Abstract: Techniques are disclosed for forming group III material-nitride (III-N) microelectromechanical systems (MEMS) structures on a group IV substrate, such as a silicon, silicon germanium, or germanium substrate. In some cases, the techniques include forming a III-N layer on the substrate and optionally on shallow trench isolation (STI) material, and then releasing the III-N layer by etching to form a free portion of the III-N layer suspended over the substrate. The techniques may include, for example, using a wet etch process that selectively etches the substrate and/or STI material, but does not etch the III-N material (or etches the III-N material at a substantially slower rate). Piezoresistive elements can be formed on the III-N layer to, for example, detect vibrations or deflection in the free/suspended portion of the III-N layer. Accordingly, MEMS sensors can be formed using the techniques, such as accelerometers, gyroscopes, and pressure sensors, for example.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: December 1, 2020
    Assignee: INTEL CORPORATION
    Inventors: Han Wui Then, Sansaptak Dasgupta, Sanaz K. Gardner, Ravi Pillarisetty, Marko Radosavljevic, Seung Hoon Sung, Robert S. Chau
  • Patent number: 10833143
    Abstract: A display panel and a method for manufacturing the same are provided. The display panel comprises a substrate, an OLED device, a cover, at least one shielding element, and a sealant. The substrate has a first surface, and the OLED device is disposed on the first surface. The cover has a second surface, and the substrate and the cover are assembled into one piece, and the first surface and the second surface face each other. The shielding element is disposed on the second surface, and the sealant is disposed between the substrate and the cover.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: November 10, 2020
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventor: Wei Yu
  • Patent number: 10797256
    Abstract: An organic electroluminescence device includes, in order, a first electrode, a hole transport layer, an organic light-emitting layer, an electron transport layer, and a second electrode. The hole transport layer is configured by a coated film. The organic light-emitting layer is configured by a coated film. The organic light-emitting layer has a light emission region provided in the organic light-emitting layer on side of the electron transport layer.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: October 6, 2020
    Assignee: JOLED INC.
    Inventors: Kazuhiro Yoneda, Noriyuki Matsusue
  • Patent number: 10770455
    Abstract: In an aspect, a circuit can include a first HEMT, a second HEMT, and a variable capacitor. A drain of the first HEMT can be coupled to a source of the second HEMT. An electrode of the variable capacitor can be coupled to a source of the first HEMT, and another electrode of the variable capacitor can be coupled to a gate of the second HEMT. In another aspect, an electronic device can include a die including a HEMT and a variable capacitor. An electrode of the variable capacitor can be coupled to a source or a gate of the HEMT, and another electrode of the variable capacitor can be coupled to an external terminal of the die. In a further aspect, an electronic device comprising a die, wherein the die includes a variable capacitor, a first diode, and a second diode.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: September 8, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Jaume Roig-Guitart
  • Patent number: 10741600
    Abstract: An imaging device including a semiconductor substrate; and a pixel. The pixel includes a photoelectric converter having a first electrode, a second electrode and a photoelectric conversion layer sandwiched between the first electrode and the second electrode, the photoelectric converter located above a surface of the semiconductor substrate; a first transistor that includes a part of the semiconductor substrate and detects electric charges; and a second transistor that includes a gate electrode and initializes a voltage of the first electrode. The first electrode, the second transistor, and the first transistor are arranged in that order toward the semiconductor substrate from the first electrode in cross sectional view, and when viewed from the direction normal to the surface of the semiconductor substrate, a part of the gate electrode overlaps the first electrode, and another part of the gate electrode does not overlap the first electrode.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: August 11, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Tokuhiko Tamaki, Junji Hirase, Shigeo Yoshii
  • Patent number: 10734502
    Abstract: Semiconductor devices include semiconductor layers and a gate stack formed on and around the semiconductor layers. Spacers are formed between vertically adjacent semiconductor layers, each spacer having a first spacer layer and a second spacer layer. The first spacer layer is positioned between the gate stack and the second spacer layer. The second spacer layer of each spacer has a trapezoidal cross-section.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: August 4, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tenko Yamashita, Chun W. Yeung, Chen Zhang
  • Patent number: 10727308
    Abstract: One device disclosed herein includes a gate above a semiconductor substrate, the gate comprising a gate structure and a gate cap, and conductive source/drain metallization structures adjacent the gate, each of the conductive source/drain metallization structures having a front face and a recess defined in each of the conductive source/drain metallization structures. In this example, the device further includes a spacer structure comprising recess filling portions that substantially fill the recesses and a portion that extends across a portion of the upper surface of the gate cap, wherein a portion of the gate cap is exposed within the spacer structure, an insulating material within the spacer structure and on the exposed portion of the gate cap, a gate contact opening that exposes a portion of an upper surface of the gate structure, and a conductive gate contact structure in the conductive gate contact opening.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: July 28, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Ruilong Xie, Hao Tang, Cheng Chi, Daniel Chanemougame, Lars W. Liebmann, Mark V. Raymond