Abstract: A DRAM device includes bit lines formed on an interlayer insulation film which covers gate electrodes on an insulation film on a semiconductor substrate. Each bit line is in contact with the corresponding source region formed in the substrate through an opening in the insulation films. Another insulation film is formed so as to cover the bit lines. A storage electrode is formed on the insulation film covering the bit line, and is in contact with a drain region in the substrate through another opening in the insulation films. The bit line has a vertical layer level lower than that of the storage electrode. The storage electrode is covered with a dielectric film, which is covered with an opposed electrode.

Abstract: In a semiconductor storage device, a capacitor section is connected with a drain region of a MOS transistor by means of a polysilicon plug. The capacitor section has a lower electrode, a ferroelectric thin film, and an upper electrode stacked in this order. A TiN barrier metal is placed between the lower electrode and the plug. The lower electrode has a lower film made of a platinum-rhodium alloy and an upper film made of a platinum-rhodium alloy oxide which is in contact with the ferroelectric thin film.