Abstract: According to a method of fabricating a memory cell for a semiconductor integrated circuit, a lower electrode having a predetermined shape is formed on a semiconductor layer. A first insulating interlayer is formed on an entire surface of the semiconductor layer such that only a top surface of the lower electrode is exposed. A dielectric having a high dielectric constant is formed on the lower electrode and on the semiconductor layer. An upper electrode is formed on the dielectric having a high dielectric constant. The upper electrode constitutes a capacitor with the lower electrode through the dielectric.