Patents Examined by Grace Cha
  • Patent number: 12761096
    Abstract: A packaged pressure sensor assembly is disclosed that includes a pressure sensor including an upper substrate and a lower substrate bonded to one another by way of a first glass frit having a first bonding temperature, so as to define a hermetically sealed pressure sensing chamber therebetween, and a housing defining an internal cavity having a base with a support surface for supporting the pressure sensor, wherein the pressure sensor is bonded to the support surface of the base by a second glass frit having a second bonding temperature that is lower than the first bonding temperature.
    Type: Grant
    Filed: March 8, 2023
    Date of Patent: October 13, 2026
    Assignee: Rosemount Aerospace Inc.
    Inventors: Jun Zheng, Weibin Zhang
  • Patent number: 12765172
    Abstract: The present application provides a display substrate, a display panel and a display device. An orthographic projection of the pixel opening of the first color sub-pixel of the display substrate on the base substrate, an orthographic projection of the pixel opening of the second color sub-pixel on the base substrate, and an orthographic projection of the pixel opening of the third color sub-pixel on the base substrate all have no overlap with the orthographic projections of the channel of the driving transistors thereof on the base substrate respectively.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: October 13, 2026
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xin Mou, Yuhsiung Feng, Hongting Lu
  • Patent number: 12745518
    Abstract: A display panel may include a plurality of pixels, a plurality of initialization lines for providing an initialization voltage to the plurality of pixels, a common line physically separated from the plurality of initialization lines, and a plurality of switching elements each including a first electrode connected to a respective one of the plurality of initialization lines and a second electrode connected to the common line.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: September 22, 2026
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Seok Ha, Kyoungsoo Kim, Kyu-Jin Park, Sung-Jae Park, Seung-Woon Shin, Ho Lee, Woon-Rok Jang
  • Patent number: 12745536
    Abstract: A light receiving element includes a first electrode, a hole transport region disposed on the first electrode, a light receiving layer disposed on the hole transport region and converting incident light to an electrical signal, an electron transport region disposed on the light receiving layer, and a second electrode disposed on the electron transport region. The light receiving layer includes a p-dopant compound, a donor compound, and an acceptor compound.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: September 22, 2026
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dongkyu Seo, Junyong Shin, Seokgyu Yoon, Daeho Lee, Byungseok Lee, Jin-Soo Jung, Minsoo Choi
  • Patent number: 12730477
    Abstract: A display device includes: a flexible substrate; and a plurality of supports on the flexible substrate and spaced apart from each other in a first direction and extending in a second direction crossing the first direction, wherein each of the plurality of supports includes glass and has a thickness of 0.1 mm or more.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: September 8, 2026
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dae Sang Yun, Young Ji Kim, Wan Jung Kim, Hyo Young Mun, Yi Seul Um, So Young Lee, Young Hoon Lee
  • Patent number: 12720996
    Abstract: The present application relates to a display panel and a display device. The display panel includes a substrate, a driving layer group, and an anode layer stacked together. The driving layer group is located in the second display region. The anode layer includes a first anode located in the first display region. The first anode is electrically connected to a drain of the driving layer group via a conducting wire. The display panel further includes a first isolation layer and a lap layer located in the first display region. The first isolation layer is arranged between the lap layer and the conducting wire. The first isolation layer includes a first via hole. The conducting wire passes through the first via hole to connect with the lap layer, to electrically connect the first anode to the drain electrode of the driving layer group.
    Type: Grant
    Filed: January 4, 2023
    Date of Patent: August 25, 2026
    Assignee: KUNSHAN GO-VISIONOX OPTO-ELECTRONICS CO., LTD.
    Inventors: Yu Jin, Enlai Wang, Yunlei Lu, Lei Li, Penghui Zhang, Mingdong Ma
  • Patent number: 12720997
    Abstract: A display panel, a manufacturing method thereof, and an electronic device are provided. By disconnecting a portion of the organic functional layer in the display panel positioned on the metal spacer and other parts of the organic function layer, and exposing a side of the metal spacer, a cathode and a metal spacer can be directly connected when the cathode is formed by a vapor deposition on the entire surface. There is no need for additional masks and the process of etching organic functional layers, therefore a manufacturing process can be simplified, and the production cost can be reduced.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: August 25, 2026
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Zehu Hu
  • Patent number: 12710697
    Abstract: The present disclosure provides an overlay mark, an overlay error measurement method for a wafer, and a wafer stacking method. The overlay mark includes a first overlay mark disposed on a first layer, and a second overlay mark disposed on a second layer. The first layer and the second layer are stacked. The first overlay mark includes at least one first overlay sub-mark, and each of the at least one first overlay sub-mark is circular in shape. The second overlay mark includes a second overlay sub-mark, and the second overlay sub-mark is in a center-symmetrical shape including a plurality of linear graphics.
    Type: Grant
    Filed: February 15, 2023
    Date of Patent: August 18, 2026
    Assignee: WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yicheng Feng, Yuheng Huang, Bang Chen
  • Patent number: 12713786
    Abstract: A display device includes a substrate including a light emission area, a light transmission area, and a boundary between the light emission area and the light transmission area, and in the light emission area, each of a circuit layer including transistors each comprising a semiconductor pattern and a gate, inorganic insulation layers on the semiconductor pattern and the gate, a light emission element on the plurality of inorganic insulation layers and connected to the circuit layer, the inorganic insulation layers respectively defining inclined side surfaces corresponding to the boundary, and among the transistors, a boundary transistor closest to the boundary. The semiconductor pattern and the gate of the boundary transistor are each inclined along the inclined side surfaces of the plurality of inorganic insulation layers.
    Type: Grant
    Filed: July 5, 2023
    Date of Patent: August 18, 2026
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Jonghyun Choi
  • Patent number: 12713767
    Abstract: Provided is a semiconductor device having a high degree of integration, which includes first and second transistors and a first insulating layer. The first transistor includes a first semiconductor layer, a second insulating layer, and first to third conductive layers. The second transistor includes a second semiconductor layer, a third insulating layer, and fourth to sixth conductive layers. The first insulating layer includes a region in contact with the first semiconductor layer and the first conductive layer and includes an opening reaching the first conductive layer. The first semiconductor layer is in contact with a top surface of the first conductive layer, an inner wall of the opening, and the second conductive layer. The second conductive layer is positioned over the first insulating layer. The third conductive layer is positioned over the first semiconductor layer and includes a region overlapping with the inner wall of the opening with the second insulating layer positioned therebetween.
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: August 18, 2026
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Masami Jintyou, Takahiro Iguchi, Chieko Misawa, Ami Sato, Masayoshi Dobashi
  • Patent number: 12701858
    Abstract: A display device includes a substrate, a display unit, a binding unit, and an encapsulation layer. The substrate includes an effective display region and a non-display region adjacent to the effective display region, and includes a silicon-containing compound material. The display unit is arranged in the effective display region. The binding unit is arranged in the non-display region and includes a binding portion and signal connection lines. Two ends of the signal connection line are connected to the display unit and the binding portion, respectively. The encapsulation layer wraps the display unit and a part of the signal connection lines The encapsulation layer covers a portion of each of the plurality of signal connection lines, at least a portion of each of the plurality of signal connection lines disposed inside a region covered by the encapsulation layer is configured as a heavily doped semiconductor connection line.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: August 4, 2026
    Assignee: HKC CORPORATION LIMITED
    Inventors: Yang Pu, Haoxuan Zheng
  • Patent number: 12677549
    Abstract: An organic light-emitting display panel and a preparation method therefor, and a display apparatus. The organic light-emitting display panel comprises: a substrate; a plurality of organic light-emitting diodes, wherein the plurality of organic light-emitting diodes are located on the substrate, and each of the organic light-emitting diodes is provided with a first electrode, a second electrode, and a light-emitting layer and a hole injection layer which are located between the first electrode and the second electrode; and anti-crosstalk isolation electrodes, wherein each of the anti-crosstalk isolation electrodes is located at a gap between two adjacent organic light-emitting diodes, the anti-crosstalk isolation electrodes are configured to connect to a fixed voltage, and a voltage difference between each anti-crosstalk isolation electrode and each second electrode is less than a voltage difference between each first electrode and each second electrode.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: July 7, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaohu Li, Lu Wang, Zhiqiang Jiao
  • Patent number: 12672314
    Abstract: The present disclosure provides a metal oxide thin film transistor, a semiconductor device and a display device, belongs to the field of display technology, and can solve a problem that current metal oxide thin film transistors have a poor stability. The metal oxide thin film transistor of the present disclosure includes a substrate and a first metal oxide semiconductor layer on the substrate; a material of the first metal oxide semiconductor layer includes a metal oxide doped with a first metal element, an electronegativity difference value between the first metal element and an oxygen element is greater than or equal to an electronegativity difference value between a metal element in the metal oxide and the oxygen element.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: June 30, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiayu He, Fangqing Wen, Ce Ning, Hehe Hu, Nianqi Yao, Kun Zhao, Zhengliang Li, Jie Huang, Feifei Li, Yan Qu, Liping Lei
  • Patent number: 12652926
    Abstract: A display region includes a second display region that transmits light used in a camera on the inner side of a first display region. A first electrode in the first display region has a structure in which a first lower transparent conductive layer, a first reflective conductive layer, and a first upper transparent conductive layer are layered in order. A first electrode in the second display region has a structure in which a second lower transparent conductive layer, a second reflective conductive layer, and a second upper transparent conductive layer are layered in order. The second reflective conductive layer is thinner than the first reflective conductive layer on the inner side of an opening of an edge cover.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: June 9, 2026
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Tohru Okabe, Ryosuke Gunji, Shinsuke Saida, Shinji Ichikawa
  • Patent number: 12648366
    Abstract: A device includes a source region, a drain region, a channel region, a pair of depletion gates, an accumulation gate, and a superconductive resonator. The channel region is between the source region and the drain region. The pair of depletion gates are spaced apart from each other. The pair of depletion gates both overlap the channel region and define a quantum dot qubit region in the channel region and between the pair of depletion gates. The accumulation gate is above and crossing the pair of depletion gates. The superconductive resonator is laterally adjacent the quantum dot qubit region.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: June 2, 2026
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Yu-Chen Yeh, Chi-Te Liang, Hsi-Sheng Goan
  • Patent number: 12648337
    Abstract: An organic device comprising a pixel region in which pixels are arranged, a peripheral region including a pad electrode, and a sealing layer arranged to cover the pixel and peripheral regions, is provided. In the peripheral region, an opening of the sealing layer is formed. The opening comprises a first portion extending from a plane defined by an upper surface of the sealing layer towards the pad electrode, and a second portion which has an outer edge inside outer edges of the first portion and the pad electrode and opens from a lower end of the first portion to the pad electrode. A conductive particle for electrical connection to an electrode is arranged on the pad electrode, and a diameter of the conductive particle is larger than a height of the second portion.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: June 2, 2026
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takashi Usui, Takayuki Suzuki, Kotaro Abukawa
  • Patent number: 12635339
    Abstract: An electronic apparatus includes: a display panel comprising a first display area, in which a first display element is arranged, and a second display area, in which a second display element and a transmission area are arranged; and a component on a lower surface of the display panel and overlapping the second display area, wherein the display panel includes: a substrate; a second pixel circuit on the substrate and electrically connected to the second display element, the second pixel circuit comprising at least one thin-film transistor; an organic insulating layer covering the at least one thin-film transistor; and a second transparent connection electrode on the organic insulating layer in the second display area and electrically connected to the second pixel circuit, wherein the second display element comprises a second pixel electrode on a same layer as the second transparent connection electrode.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: May 19, 2026
    Assignee: Samsung Display Co., Ltd.
    Inventors: Wonse Lee, Jieun Lee
  • Patent number: 12628507
    Abstract: The present disclosure provides a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes a base substrate and a drive structure layer disposed on the base substrate, wherein the drive structure layer includes a first transistor and a second transistor arranged side by side, the first transistor includes a low temperature poly silicon transistor, and the second transistor includes an oxide transistor; the first transistor includes a first bottom gate electrode simultaneously served as a shielding layer, the second transistor includes a second bottom gate electrode simultaneously served as a shielding layer, and the first bottom gate electrode and the second bottom gate electrode are arranged in a same layer.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: May 12, 2026
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Peng Huang, Tao Gao, Bingqiang Gui, Ke Yang
  • Patent number: 12622135
    Abstract: The present disclosure provides an organic light emitting diode and a display panel. The organic light emitting diode includes: a base; a micro-nano structure layer on a side of the base; a first electrode on a side of the micro-nano structure layer away from the base; an electroluminescence layer on a side of the first electrode away from the micro-nano structure layer; and a second electrode on a side of the electroluminescence layer away from the first electrode.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: May 5, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Fudong Chen, Zhiqiang Jiao, Qingyu Huang
  • Patent number: 12615776
    Abstract: A three dimensional semiconductor device is disclosed. The tree dimensional semiconductor device includes a word line stack over a substrate and a channel pillar structure passing through the word line stack in a vertical direction perpendicular to a top surface of the substrate. The channel pillar structure includes a channel structure. The channel structure includes a blocking layer, a trap layer, a tunneling layer, a channel layer, a filling layer, and a back gate electrode. The channel structure has a pillar shape.
    Type: Grant
    Filed: January 25, 2023
    Date of Patent: April 28, 2026
    Assignees: SK hynix Inc., Industry-University Cooperation Foundation Hanyang University
    Inventors: In Ku Kang, Chang Han Kim, Yun Heub Song, Jae Min Sim