Patents Examined by Granvill David Lee
  • Patent number: 6960537
    Abstract: A high k dielectric film and methods for forming the same are disclosed. The high k material includes two peaks of impurity concentration, particularly nitrogen, such as at a lower interface and upper interface, making the layer particularly suitable for transistor gate dielectric applications. The methods of formation include low temperature processes, particularly CVD using a remote plasma generator and atomic layer deposition using selective incorporation of nitrogen in the cyclic process. Advantageously, nitrogen levels are tailored during the deposition process and temperatures are low enough to avoid interdiffusion and allow maintenance of the desired impurity profile.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: November 1, 2005
    Assignee: ASM America, Inc.
    Inventors: Eric J. Shero, Christophe Pomarede
  • Patent number: 6872639
    Abstract: An integrated circuit has a multi-layer stack such as a gate stack or a digit line stack disposed on a layer comprising silicon. A conductive film is formed on the transition metal boride layer. A process for fabricating such devices can include forming the conductive film using a vapor deposition process with a reaction gas comprising fluorine. In the case of a gate stack, the transition metal boride layer can help reduce or eliminate the diffusion of fluorine atoms from the conductive film into a gate dielectric layer. Similarly, in the case of digit line stacks as well as gate stacks, the transition metal boride layer can reduce the diffusion of silicon from the polysilicon layer into the conductive film to help maintain a low resistance for the conductive film.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: March 29, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Scott J. DeBoer, Husam N. Al-Shareef
  • Patent number: 6849494
    Abstract: A unique electrochemical process fills oxygen vacancies in dielectrics while reducing oxidation of nearby electrodes and conductors. Preferably, an electromagnetic field or bias is applied to a dielectric. The bias causes oxygen vacancies in the dielectric to migrate to the surface of the dielectric. As the oxygen vacancies migrate toward the surface, oxygen ions fill the oxygen vacancies. In one embodiment, a unique plasma treatment provides the oxygen ions that react with the oxygen vacancies. In another embodiment, a unique electrolysis treatment provides the oxygen ions that react with the oxygen vacancies.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: February 1, 2005
    Assignee: Micron Technology Inc.
    Inventors: Cem Basceri, Gurtej S. Sandhu
  • Patent number: 6812111
    Abstract: In methods for fabricating MOS transistors with notched gate electrodes, a notched gate electrode may be readily fabricated using a damascene process for filling a stair-shaped opening formed in a multi-layered insulation layer. In this manner, the width and a height of the notch region of the gate electrode may be readily adjusted and controlled.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: November 2, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kong-Soo Cheong, Hee-Sung Kang