Patents Examined by Grims Philippe
  • Patent number: 6377622
    Abstract: A plurality of layers having other resolution are coded in order to encode scalably shape information. A base layer having the lower resolution is coded and transmitted to a decoder, and an enhancement layer is coded by employing a scan interleaving method from the base layer. A scan order of vertical and horizontal scannings is decided according to a generation frequency of TSD (transitional sample data) and ESD (exceptional sample data) and the number of coding bits on the base layer, or a type of boundary lines on images. When the scan order is decided, additional information indicating the scan order is transmitted to the decoder. The base layer is also coded and transmitted to the decoder. In case that the scan order is decided according to the horizontal and vertical of the boundary lines on an image of the base layer, it is no need to transmit the additional information indicating the scan order on the received base layer and execute the decoding in the same order as the coded scan order.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: April 23, 2002
    Assignee: Hyundai Electronics Ind. Co., Ltd.
    Inventors: Jong-Deuk Kim, Sung-Moon Chun, Jae-Won Chung, Joo-Hee Moon
  • Patent number: 6282244
    Abstract: An apparatus and method for decoding compressed digital video data which has been compressed, for example in a format compliant with the Motion Picture Experts Group I (MPEG) standard or the Joint Picture Experts Group (JPEG) standard. The apparatus and method allows a fast decoding rate for the compressed digital video data. A variable length decoding (VLD) circuit is used to generate a first bit sequence of a fixed length by decoding the received compressed digital video data. Then, an inverse quantizer is used to convert the first bit sequence by inverse quantization into a second bit sequence. A zig-zag buffer is then used to store the second bit sequence at specific locations and output a plurality of frequency-division binary signal bits concurrently in parallel. An inverse discrete cosine transfer (IDCT) circuit is used to process the plurality of frequency-division binary signal bits according to an inverse discrete cosine transfer function, to generate a plurality of time-division binary signal bits.
    Type: Grant
    Filed: August 20, 1996
    Date of Patent: August 28, 2001
    Assignee: United Microelectronics Corp.
    Inventor: Yi-Kwang Hu