Patents Examined by Guy Lamare
  • Patent number: 6170070
    Abstract: A test method for a cache memory of a multiprocessor system. The multiprocessor system has a shared memory structure accessed via a system bus, including a multiplicity of processor modules, each acting as a master of the bus and each having a cache module, and a shared memory module for storing data shared by the processor modules. The test method includes dividing the cache memory into a test region, to be tested, and a code region, to store a program, positioning a test program in the shared memory at a place corresponding to the code region of the cache memory, and reading the test program stored in the shared memory and writing the test program in the code region of the cache memory to perform the test program. Accordingly, the total cache region is divided into a test region and a code region, and then only the test region is tested, to thereby enhance the test performance.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: January 2, 2001
    Assignee: SamSung Electronics Co. Ltd.
    Inventors: Seok-mann Ju, Hyun-gue Huh