Patents Examined by H. Jay Tsai
  • Patent number: 6713339
    Abstract: The invention includes a switchable circuit device. The device comprises a first conductive layer and a porous silicon matrix over the first conductive layer. A material is dispersed within pores of the porous silicon matrix, and the material has two stable states. A second conductive layer is formed over the porous silicon matrix. A current flow between the first and second conductive layers is influenced by which of the stable states the material is in.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: March 30, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 6180445
    Abstract: A new method is provided for the creation of a high Q inductor that can be applied together with the mounting of flip chip semiconductor die on a substrate. The process of the invention starts with a semiconductor surface over which a layer of insulation and intra-metal dielectric have been deposited with interconnect patterns created in said layers of insulation and dielectric. A layer of low-K polyimide is deposited over the surface of the intra-metal dielectric, active circuits have previously been created in the substrate. After the layer of low-K polyimide has been deposited, a redistribution pattern is defined in the layer of low-K poly. Metal is deposited that forms the redistribution metal, the deposited layer of metal is planarized thereby forming the metal redistribution pattern. The inductor is next defined, the inductor is created on the surface of the layer of low-K polyimide.
    Type: Grant
    Filed: April 24, 2000
    Date of Patent: January 30, 2001
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Chao-Chieh Tsai