Abstract: Storage destination controller devices wherein N number of data strips and M number of parity strips comprised in each stripe are determined so that the parity strips are not continuously stored to the same memory device between two consecutive stripes when a plurality of stripes, each comprising the N number of data strips and the M number of parity strips of different types, are distributed and stored to the N+M number of memory devices.

Abstract: A data processing method for a disk array device capable of achieving a duplex system of data and improving performance of the same device while a quantity of processing for writing into a cache memory (through a switch) is reduced. In the disk array device, a host interface portion comprises a nonvolatile memory portion for saving data written from a host computer/server, and a data transfer control portion for transferring write data from the host computer/server to the nonvolatile memory portion and a global cache memory portion. If a write request is received from the host computer/server, a data transfer control portion transfers the write data from the host computer/server to the nonvolatile memory portion and to the global cache memory portion through a switch portion.

Abstract: A method for pre-allocating memory for object-based cache data is provided in which request for an object having an associated property parameter that defines the memory requirements for the object. In response, a table of allocation buckets is searched for a bucket having the associated property parameter that can at least meet the memory requirements for the requested object. If an object identifier (OID), having a previously allocated physical address in main memory, is identified in the table of allocation buckets then the identified OID is assigned to the object. The object is stored in the object cache with the assigned OID, and the OID is removed from the bucket. Also included is a table of allocation buckets in a computer system in which each of a plurality of buckets is capable of holding object identifiers (OIDs).

Abstract: In one embodiment, a computer accessible medium comprises instructions which, when executed, check a first storage from which a computer system is configured to boot for a block identified in a read request. The block is included within an image of a set of software resources to be provisioned on the computer system. If the block is stored in the first storage, the instructions supply the block from the first storage in response to the read request. Otherwise, the instructions: fetch the block from an image repository system that stores the image; store the block in the first storage; and supply the block in response to the read request. In another embodiment, the instructions store a block identified in a write request to the first storage. The instructions record that the block is modified in the first storage with respect to the image stored in an image repository system.

Abstract: A technique to manage multiple-mapped memory and to selectively execute at least a portion of a process from either an unprotected function or a protected function. The process contains memory that is multiple-mapped to both an unprotected memory region and to a protected memory region that stores a protected function. A trust co-processor determines whether the process is a trusted process or an untrusted process. If trusted, the multiple-mapped memory is mapped to the protected memory region; and a transfer agent operates to control the process and to call the protected function using parameters provided to the transfer agent from the process. In one embodiment, the transfer agent resides in nonvolatile memory, and is transferred to internal SRAM to control execution of a trusted process.

Abstract: In a client-cache-server system, the weight value of a first object which is maintained in the cache and linked to a second object maintained in the server is determined. Based on the weight value, a decision is made as to whether prefetching is necessary. If the decision indicates that prefetching is necessary, the second object is prefetched from the server to refresh the cache. A further decision is made as to whether update enquiry is necessary based on the weight value. If the further decision indicates that update enquiry is necessary, a message is sent to the server for inquiring whether the first object has been updated in the server. If the server responds with a reply that indicates that the first object has been updated, the second object is prefetched from the server to refresh the cache.

Abstract: Methods and apparatus are disclosed for performing lookup operations using associative memories, including, but not limited to modifying search keys within an associative memory based on modification mappings, forcing a no-hit condition in response to a highest-priority matching entry including a force no-hit indication, selecting among various sets or banks of associative memory entries in determining a lookup result, and detecting and propagating error conditions. In one implementation, each block retrieves a modification mapping from a local memory and modifies a received search key based on the mapping and received modification data. In one implementation, each of the associative memory entries includes a field for indicating that a successful match on the entry should or should not force a no-hit result. In one implementation, an indication of which associative memory blocks or sets of entries to use in a particular lookup operation is retrieved from a memory.

Abstract: A data storage interface for coupling data between processors and a bank of disk. The interface includes a plurality of first directors coupled to the processors and a plurality of second directors coupled to the bank of disk drives. A cache memory is coupled between the plurality of first directors and the plurality of second directors. The interface includes a pair of independent power busses. At least one of the first or second directors is coupled to the pair of independent power busses. One portion of the disk drives in the bank is connected to only a first one of the pair of power buses and a different portion of the disk drives is connected to only the other one of the pair of power buses. A power circuit includes a pair of input terminals, each one being electrically connected to a corresponding one of the pair of independent power busses. The circuit includes an output terminal. A pair of switching transistor sections is provided.

Abstract: Methods and apparatus for performing wear leveling in a non-volatile memory system are disclosed. According to one aspect of the present invention, a method for allocating non-volatile memory that is divided into elements includes grouping the elements into a first group, a second group, and a third group. The first group includes erased elements with relatively low wear and the second group includes erased elements with relatively high wear. The method also includes determining when a first element included in the third group is to be replaced by a second element included in the first group. Contents of the first element are copied into the second element obtained from the first group. The contents are then erased from the first element, and the second element is associated with the third group. Associating the second element with the third group includes substantially disassociating the second element from the first group.

Abstract: A method and system for enabling a director to perform an atomic read-modify-write operation on plural bit read data stored in a selected one of a plurality of memory locations. The method includes providing a plurality of successive full adders, each one of the full adders being associated with a corresponding one of the bits of the plural bit read data. Each one of the full adders has a summation output, a carry bit input and a carry bit output. The method includes adding in each one of the full adders: (a) a corresponding bit of plural bit input data provided by the director; (b) the corresponding one of the bits of the plural bit read data; and, (c) a carry bit fed the carry bit input from a preceding full adder. Each one of the full adders provides: (a) a carry bit on the carry output thereof representative of the most significant bit produced by the full adder; and, (b) a bit on the summation output representative of a least significant bit produced by the full adder.

Abstract: The present invention provides systems and methods for allocating a pool of global memory among a set of client/servers so that storage volumes associated with a plurality of client/servers are each allocated a portion of the pool of global memory for caching of data from that volume. The amount of memory to be used for caching the volume's input/output operations (I/Os), the page size, the cache type, the cache replacement policy and the maximum cache read can be specified by volume. The amount of memory to be used for caching the volume's input/output operations, the cache type, the cache replacement policy and the maximum cache read I/O size can be changed dynamically by the changing volume-based attributes.

Abstract: In a multiprocessor system in which a plurality of processors share an n-way set-associative cache memory, a plurality of ways of the cache memory are divided into groups, one group for each processor. When a miss-hit occurs in the cache memory, one way is selected for replacement from the ways belonging to the group corresponding to the processor that made a memory access but caused the miss-hit. When there is an off-line processor, the ways belonging to that processor are re-distributed to the group corresponding to an on-line processor to allow the on-line processor to use those ways.