Abstract: A method for programming a plurality of data sequences into a corresponding plurality of flash memory functional units using a programming process having at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence, the method comprising providing at least one indication of at least one varying situational characteristic and determining a value for said at least one selectable programming duration-controlling parameter controlling the duration of the programming process for a given data sequence, for each flash memory functional unit, depending at least partly on said indication of said varying characteristic; and, for each individual flash memory functional unit from among said plurality of flash memory functional units, programming a sequence of bits into said individual flash memory functional unit using a programming process having at least one selectable parameter, said at least one selectable parameter being set at said

Abstract: A method and apparatus adaptively controlling a page open time for a memory device are disclosed. The method includes determining a page open maintenance time of an access-requested page based on system information and intellectual property (IP) request information; and controlling closing of an open page based on the determined page open maintenance time.

Abstract: Systems and methods for managing mapping information for objects maintained in a distributed storage system are provided. The distributed storage system can include a keymap subsystem that manages the mapping information according to object keys. Requests for specific object mapping information are directed to specific keymap coordinators within the keymap subsystem. Each keymap coordinator can maintain a cache for caching mapping information maintained at various information sources. To manage the cache, the keymap system can utilize information placeholders that replace previously cached keymap information while a request to modify keymap information is being processed by the information sources. Each keymap coordinator can process subsequently received keymap information read requests in the event an information placeholder is cached as the current cached keymap information.

Abstract: A method includes receiving input data comprising a plurality of bits and processing an access control list into an ESOP expression comprising a plurality of product terms. The method also includes storing a plurality of bits associated with the plurality of product terms in a TCAM comprising a plurality of rows and comparing the plurality of bits associated with the input data to the plurality of bits associated with the product terms stored in each row of the plurality of rows, such that each row of the TCAM outputs a plurality of signals, such that each of the plurality of signals indicate a match or no match for each bit stored in the selected row. The method includes receiving the plurality of signals from the plurality of rows by an ESOP evaluator and outputting an address associated with a selected row from the plurality of rows of the TCAM.

Abstract: A programmable integrated circuit device (IC) can include a configuration controller configured to assert a suspend request signal responsive to an input triggering suspend mode within the programmable IC and a memory controller block coupled to the configuration controller and a memory device. The memory controller block can be configured to place the memory device in self refresh mode in response to the suspend request signal and assert a suspend acknowledgement signal subsequent to placing the memory device in self refresh mode. The configuration controller can continue implementing suspend mode within the programmable IC in response to assertion of the suspend acknowledgement signal.

Abstract: A method is used in iterating for deduplication. A collection of data is selected from a set of storage extents. The collection of data is comprised of respective subset of the contents of each storage extent of the set of storage extents. A deduplicating technique is applied to the collection of data.

Abstract: A data processing apparatus comprises a processor constructed to operate under control of a sequence of program instructions selected from a predetermined instruction set; master circuitry to request access to storage locations of the processor; an interface circuit to provide an interface for an external apparatus to signal a request for access to the storage locations and an interface for the master circuitry to signal a request for access to the storage locations; and control to provide access between the storage locations and the interface circuit in response to the request only at predetermined points in execution of the stored program, the control being operable to fix periods of time for providing such access relative to the sequence of program instructions such that execution timing of the stored instructions is independent of whether a request is supplied to the interface.

Abstract: An unmount state storing unit configured to store a state of unmount processing to end access processing to a memory card attached to a device from a host computer is provided. During a period from immediately after a host computer executes the unmount processing until detaching of the memory card is detected, a value of the host computer unmount state storing unit is stored as “true”. During the period in which this value is “true”, a host computer mount request from another host computer is denied. Consequently, after the access processing to the memory card attached to a device by the host computer has ended, contents of the memory card cannot be read from the other host computer while the memory card is still attached.

Abstract: In general, the present invention relates to data cache processing. Specifically, the present invention relates to a system that provides reconfigurable dynamic cache which varies the operation strategy of cache memory based on the demand from the applications originating from different external general processor cores, along with functions of a virtualized hybrid core system. The system includes receiving a data request, selecting an operational mode based on the data request and a predefined selection algorithm, and processing the data request based on the selected operational mode. The system is further configured to delegate computational or memory resource needs to a plurality of sub-processing cores for processing to satisfy application demands.

Abstract: With a RAID group not configured from a plurality of storage devices, a storage area of a storage device is provided directly to a virtual volume instead of providing a logical volume inside the RAID group to the virtual volume. That is, the storage system, upon receiving a write request with respect to a virtual storage area, first, specifies a data redundancy configuration (the number of data partitions and the number of created parities) and a RAID level set to a virtual volume including this virtual storage area. The storage system selects storage devices in the numbers in accordance with the specified RAID level and redundancy configuration for this virtual storage area. The storage system selects, from among the selected storage devices, a storage area that is not allocated to any virtual storage area, and allocates this storage area to this virtual storage area. The storage system partitions the data and writes this data together with the parity to this allocated storage area.

Abstract: A storage system according to one embodiment includes logic integrated with and/or executable by a hardware processor, the logic being configured to: determine an ownership status for each of a plurality of instances of a file in a first storage tier and in a second storage tier of the storage system; determine locations of the instances of the file in the storage system; determine whether the instances of the file in the first storage tier are being accessed or not being accessed; and assign each of the instances of the file to one of a plurality of indices using the determined ownership status, location, and whether the instances are being accessed.

Abstract: A non-transitory computer-readable medium storing an data storing program executed by an archive device including a first storage unit for storing data and a second storage unit for storing hash value determined from the data, the program causing the archive device to execute a process includes receiving hash value determined from data to be stored from an external device which requests storage of the data, comparing the received hash value with the hash value stored in the second storage unit, and transmitting request information for transmitting the data corresponding to the received hash value to the external device which transmits the hash value when the received hash value has not been stored in the second storage unit.

Abstract: A storage system according to one embodiment includes a first storage tier; a second storage tier; logic for storing instances of a file in the first storage tier and the second storage tier; logic for receiving a request to access the file or instance thereof from a user in a group of users; logic for providing the user requesting access to the file with remote access to an instance of the file on the first storage tier that is not being used by any other user in the group of users; logic for setting an ownership status of the instance of the file on the first storage tier to owned by the user requesting access to the file; and logic for setting an ownership status of an unused instance of the file on the second storage tier from owned by the user requesting access to the file to unowned or owned by a second user which previously owned the instance of the file on the first storage tier. Additional systems, methods, and computer program products are also presented.

Abstract: A processor may include several processor cores, each including a respective higher-level cache, wherein each higher-level cache includes higher-level cache lines; and a lower-level cache including lower-level cache lines, where each of the lower-level cache lines may be configured to store data that corresponds to multiple higher-level cache lines. In response to invalidating a given lower-level cache line, the lower-level cache may be configured to convey a sequence including several invalidation packets to the processor cores via an interface, where each member of the sequence of invalidation packets corresponds to a respective higher-level cache line to be invalidated, and where the interface is narrower than an interface capable of concurrently conveying all invalidation information corresponding to the given lower-level cache line. Each invalidation packet may include invalidation information indicative of a location of the respective higher-level cache line within different ones of the processor cores.

Abstract: A memory-array decoder operably coupled to a memory array comprising a sequence of rows and receiving as input a plurality of address bits whereby these address bits are transformed by transforming logic. This transforming logic may include adders. Transforming logic may alternately include comparators or exclusive-or circuits. Transforming logic comprising adders may include overflow carry bits that are discarded, ignored, or otherwise not used or the overflow logic may be omitted altogether.

Abstract: A device, system, and method are disclosed. In one embodiment the device includes a non-volatile memory (NVM) storage array to store a plurality of storage elements. The device also includes a dual-scope directory structure having a background space and a foreground space. The structure is capable of storing several entries that each correspond to a location in the NVM storage array storing a storage element. The background space includes entries for storage elements written into the array without any partial overwrites of a previously stored storage element in the background space. The foreground space includes entries for storage elements written into the array with at least one partial overwrite of one or more previously stored storage elements in the background space.

Abstract: A method and apparatus used within memory and data processing that reduces the number of references allowed in processor cache by using active rows to reject references that are less frequently used from the cache. Comparators within a memory controller are used to generate a signal indicative of a row hit or miss, which signal is then applied to one or more demultiplexers to enable or disable transfer of a memory reference to processor cache locations. The cache may be level one (L1) or level two (L2) caches including data and or instructions or some combination of L1, L2, data, and instructions.

Abstract: A device is connected between an storage device controller and a storage device, providing data storage device protection in a manner transparent to the computing system and to the user of the computing system independent of operating system. The device protects the user from malicious code by preventing its execution and the unauthorized or unwanted user data modification by making the contents of one of the storage device read only. All the operations of the device are invisible to the computing system and to the user independent of installed operating system. The device can be disabled by a switch or by other means. When this happens the effect is the same as if the device were physically removed of the computing system.

Abstract: A method for transferring data in a memory system including at least first and second memories, includes activating the first memory to conduct a read operation, activating the second memory during the read operation of the first memory, and transferring data which is obtained from the read operation, directly to the second memory from the first memory.

Abstract: A storage system according to one embodiment includes a first storage tier; an intermediate storage tier; a second storage tier; logic for storing instances of a file in the first storage tier, the intermediate storage tier, and the second storage tier; logic for determining which of a plurality of instances of the file in the first storage tier are to be migrated to the second storage tier; logic for copying one instance of the file from the first storage tier to the intermediate storage tier; and logic for copying the instance of the file from the intermediate storage tier to the second storage tier for creating an instance of the file on the second storage tier for each instance of the file on the first storage tier that is to be migrated to the second storage tier. Additional systems, methods, and computer program products are also presented.