Abstract: A semiconductor package assembly includes a first substrate. A first semiconductor die is disposed on the first substrate. A passive device is located directly on the first semiconductor die. The passive device is disposed within a boundary of the first semiconductor die in a plan view.

Abstract: Package assemblies including a die stack and related methods of use. The package assembly includes a substrate with a first surface, a second surface, and a third surface bordering a through-hole extending from the first surface to the second surface. The assembly further includes a die stack, a conductive layer, and a lid. The die stack includes a chip positioned inside the through-hole in the substrate. A section of the conductive layer is disposed on the third surface of the substrate. A portion of the lid is disposed between the first chip and the section of the conductive layer. The conductive layer is configured to be coupled with power, and the lid is configured to be coupled with ground. The portion of the lid may act as a first plate of a capacitor, and the section of the conductive layer may act as a second plate of the capacitor.

Abstract: Disclosed are various embodiments of systems, devices and methods for forming an hermetic seal between a lid and a submount for an electronics module or package. At least one thieving pad is connected to a metallized ring formed about or near the circumference of an upper surface of the submount. A corresponding metallized ring is disposed about the lower perimeter of the lid. Solder paste is placed between the two metallized rings and melted, preferably under a reducing atmosphere. Excess molten solder controllably flows towards the at least one thieving pattern while the lid is being hermetically sealed and soldered, avoiding the formation of undesired wayward solder balls inside the package.

Abstract: A method and structure for a wafer level package is provided, which utilizes a plurality of spacer walls on a semiconductor wafer or a transparent substrate, which has the ability to decide the position of the sealant. As a result, the dimension of a device is decided by the position of the sealant and the spacer walls, therefore, shrinking the distance between the photosensitive zone and the sealant will enhance the gross dies after performing a die sawing process to the whole semiconductor wafer. In addition, the semiconductor process decides the height of the spacer walls so that the yield will be improved due to the fact that a uniformity of the gap, which is between the semiconductor wafer and the transparent substrate, and the width of sealant, will be controlled.

Abstract: A light-emitting unit includes an LED, a lead on which the LED is mounted, and a transparent protector covering the LED. The lead is formed with a dent to accommodate the LED. The dent includes a bottom surface to which the LED is attached and a side surface extending from the bottom surface in a flaring manner. The side surface of the dent is formed with at least one opening so that it avoids encircling the LED completely.