Patents Examined by Harry Byrne
  • Patent number: 8054666
    Abstract: In an information storage device, a writing magnetic layer is formed on a substrate and has a magnetic domain wall. A connecting magnetic layer is formed on the writing magnetic layer, and an information storing magnetic layer is formed on an upper portion of side surfaces of the connecting magnetic layer. A reader reads information stored in the information storing magnetic layer.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Chee-kheng Lim
  • Patent number: 8027184
    Abstract: A semiconductor storage device includes: reading blocks; third wirings; reading switches; a control circuit; and evaluating circuits. The reading blocks includes first and second wirings extended in a first and second direction, respectively, and resistive storage elements arranged at points where the first and second wirings intersect. The third wirings is extended in the second direction and provided correspondingly to the second wirings. The reading switches are arranged between the third and second wirings. The control circuit controls the reading switches and supplies currents or the like to the first wirings. The evaluating circuits are connected to the third wirings and evaluate the currents or the like. When data is read out, the control circuit selects a selection reading block and a selection first wiring and supplies the currents or the like, and the evaluating circuits execute the evaluations of the currents or the like in the third wirings.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: September 27, 2011
    Assignee: NEC Corporation
    Inventor: Yuukou Katou
  • Patent number: 8027186
    Abstract: A programming circuit of a phase change memory cell includes a controllable current generator to supply a programming pulse and an internal control unit coupled to the controllable current generator for stepwise modifying the programming pulse. The internal control unit, in turn, includes a control signal generator to provide the controllable current generator with a plurality of control signals. An oscillator provides a time reference signal and a driving module drives the control signal generator based on the time reference signal. As a result, a programming pulse with stepwise adjustable slope can be produced, including such a pulse with different leading and trailing edges.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: September 27, 2011
    Assignee: Intel Corporation
    Inventors: Ravi P. Gutala, Ferdinando Bedeschi, Johnny Javanifard