Patents Examined by Hoa (Holly) Le
  • Patent number: 12388248
    Abstract: A cable gland including a component and at least one contact element. The at least one contact element includes a plurality of substantially geometrically identically shaped windings. Each winding includes a retaining section for electrically contacting the component surrounding the contact element, at least one supporting section for electrically contacting a shield of a long-molded part, and a first and a second extending section. The retaining section, the first extending section and the at least one supporting section are arranged one after the other.
    Type: Grant
    Filed: November 1, 2024
    Date of Patent: August 12, 2025
    Assignee: PFLITSCH GMBH & CO. KG
    Inventors: Martin Lechner, Robert Von Otte
  • Patent number: 12376230
    Abstract: Provided are: a structure with a conductive pattern that can be obtained in a simple manufacturing process and that exhibits favorable interlayer adhesion; and a method for manufacturing same. An embodiment of the present invention provides a structure with a conductive pattern, the structure comprising a base material, and a copper-containing conductive layer arranged on the surface of the base material, wherein when a principal surface of the conductive layer on the side facing the base material is a first principal surface, and a principal surface of the conductive layer on the opposite side from the first principal surface is a second principal surface, the conductive layer: has a porosity of 0.01 to 50 volume percent in a first principal surface-side region that extends from the first principal surface to a depth of 100 nm in the thickness direction of the conductive layer.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: July 29, 2025
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventors: Tomoko Kozono, Toru Yumoto
  • Patent number: 12371551
    Abstract: The present disclosure provides a resin composition, a polarizer, and a display device, which include a first polymer and a polymer-modified whisker dispersed in the first polymer. The polymer-modified whisker includes a whisker and a second polymer attached to a surface of the whisker. The first polymer is a lipophilic polymer, and the second polymer is a lipophilic polymer.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: July 29, 2025
    Assignee: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Lesheng Yu
  • Patent number: 12370518
    Abstract: Provided are a core-shell structured perovskite nanocrystalline particle light-emitting body, a method of preparing the same, and a light emitting device using the same. The core-shell structured organic-inorganic hybrid perovskite nanocrystalline particle light-emitting body or metal halide perovskite nanocrystalline particle light-emitting body is able to be dispersed in an organic solvent, and has a perovskite nanocrystal structure and a core-shell structured nanocrystalline particle structure. Therefore, in the perovskite nanocrystalline particle light-emitting body of the present invention, as a shell is formed of a substance having a wider band gap than that of a core, excitons may be more dominantly confined in the core, and durability of the nanocrystal may be improved to prevent exposure of the core perovskite to the air using a perovskite or inorganic semiconductor, which is stable in the air, or an organic polymer.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: July 29, 2025
    Assignee: SN DISPLAY CO., LTD.
    Inventors: Tae-Woo Lee, Sanghyuk Im, Young-Hoon Kim, Himchan Cho
  • Patent number: 12365151
    Abstract: Manufacturing method of a body protection and resulting body protection, wherein the method comprises producing a structural shell (10) with a maximum thickness of 5 mm, made of thermoplastic material, and defining a concave interior (11) and a convex exterior (12); over-moulding an expanded polystyrene layer (20) overlapping the concave interior (11) of the structural shell (10), producing its adhesion by close contact to the structural shell (10); and wherein the structural shell (10) is produced by means of the distributed placement, in a mould, of a mixture of thermoplastic material and of reinforcing fibres stable at temperatures equal to or lower than the melting temperature of the thermoplastic material, the closure and heating of the mould causing the melting of the thermoplastic material without damaging the reinforcing fibres, and the subsequent cooling of the mould, hardening the thermoplastic material with the reinforcing fibres embedded therein.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: July 22, 2025
    Inventors: Javier Cadens Ballarin, Xavier Mateu Codina
  • Patent number: 12362360
    Abstract: The present disclosure relates to: a positive electrode NCM-based active material in which a crystallite size is 460 ? or more; a positive electrode including the positive electrode NCM-based active material; and a battery including the positive electrode. According to the present disclosure, there are provided: the positive electrode NCM (nickel-cobalt-manganese)-based active material that can exhibit an improved low-temperature low-SOC output property as well as high thermal stability; the positive electrode including the positive electrode NCM-based active material; and the battery including the positive electrode.
    Type: Grant
    Filed: January 18, 2024
    Date of Patent: July 15, 2025
    Assignee: PRIME PLANET ENERGY & SOLUTIONS, INC.
    Inventors: Akihiro Tabushi, Hiroki Watanabe
  • Patent number: 12352685
    Abstract: An apparatus for measuring the absorbance of a substance in a solution includes at least one sample cell arranged to contain the solution that is at least partially transparent to light of a predefined wavelength spectrum, at least two light passages through the at least one sample cell, each of the light passages having a known path length, an LED light source arrangement including at least two LEDs, each arranged to emit a light output with a wavelength within the predefined wavelength spectrum. A plurality of optical fibers, one for each light passage, is arranged at each LED for receiving the light output and guiding it to the light passages. A method for measuring the absorbance of a substance in a solution includes providing the LED light source arrangement with an associate fiber bundle for each LED.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: July 8, 2025
    Assignee: Cytiva Sweden AB
    Inventor: Hanno Ehring
  • Patent number: 12356790
    Abstract: An electroluminescent display device and a light emitting device including a blue light emitting layer include a first electrode, a second electrode, and a light emitting layer between the first electrode and the second electrode. The light emitting layer includes a blue light emitting layer including a plurality of nanostructures, the plurality of nanostructures does not include cadmium. On an application of a bias voltage, the blue light emitting layer is configured to emit light of an emission peak wavelength (?max) in a range of greater than or equal to about 445 nm and less than or equal to about 480 nm.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: July 8, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Hyung Kim, Heejae Chung, Eun Joo Jang, Sujin Park, Yuho Won
  • Patent number: 12354987
    Abstract: A semiconductor package including a semiconductor chip, a redistribution layer structure disposed under the semiconductor chip, a bump pad disposed under the redistribution layer structure and having an upper structure of a first width and a lower structure of a second width less than the first width, a metal seed layer disposed along a lower surface of the upper structure and a side surface of the lower structure, an insulating layer surrounding the redistribution layer structure and the bump pad, and a bump structure disposed under the bump pad. A first undercut is disposed at one end of the metal seed layer that contacts the upper structure, and a second undercut is disposed at an other end of the metal seed layer that contacts the lower.
    Type: Grant
    Filed: April 16, 2024
    Date of Patent: July 8, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeonggi Jin, Solji Song, Taehwa Jeong, Jinho Chun, Juil Choi, Atsushi Fujisaki
  • Patent number: 12356546
    Abstract: The present disclosure relates to a printed circuit board including a first insulating layer, a pad embedded in an upper portion of the first insulating and having an upper surface portion, a side surface portion, and a lower surface portion, where a portion of the upper surface portion and a portion of the side surface portion protrude from the upper surface of the first insulating layer, and a metal layer covering the portion of the upper surface portion, the portion of the side surface portion, and a portion of the lower surface portion of the pad.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: July 8, 2025
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Woo Seok Yang, Seung Chul Kim
  • Patent number: 12352562
    Abstract: A method includes the following steps: providing a toothed component on a coordinate measuring machine, wherein the measuring machine has first and second sensors for measuring geometric features of the toothed component, and movement axes for executing a measuring movement for acquiring measured values on the toothed component; first measuring of a geometric feature of the toothed component using the first and/or second sensor. A first relative measuring movement is executed to travel along a first measuring path, wherein one or more first measured values are acquired to determine the geometric feature. The method also includes the step of second measuring of a geometric feature of the toothed component using the first and/or second sensor, wherein a second relative measuring movement is executed to travel along a second measuring path; wherein an evaluation of the second measurement takes place in consideration of an axis position known from the first measurement.
    Type: Grant
    Filed: January 25, 2023
    Date of Patent: July 8, 2025
    Assignee: KLINGELNBERG GMBH
    Inventors: Markus Finkeldey, Jan Merkert
  • Patent number: 12349282
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques directed to embedding capacitors in through glass vias within a glass core of a substrate. In embodiments, the through glass vias may extend entirely from a first side of the glass core to a second side of the glass core opposite the first side. Layers of electrically conductive material and dielectric material may then be deposited within the through glass via to form a capacitor. the capacitor may then be electrically coupled with electrical routings on buildup layers on either side of the glass core. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: July 1, 2025
    Assignee: Intel Corporation
    Inventors: Benjamin Duong, Aleksandar Aleksov, Helme A. Castro De La Torre, Kristof Darmawikarta, Darko Grujicic, Sashi S. Kandanur, Suddhasattwa Nad, Srinivas V. Pietambaram, Rengarajan Shanmugam, Thomas L. Sounart, Marcel Wall
  • Patent number: 12341125
    Abstract: A method of direct hybrid bonding first and second semiconductor elements of differential thickness is disclosed. The method can include patterning a plurality of first contact features on the first semiconductor element. The method can include second a plurality of second contact features on the second semiconductor element corresponding to the first contact features for direct hybrid bonding. The method can include applying a lithographic magnification correction factor to one of the first patterning and second patterning without applying the lithographic magnification correction factor to the other of the first patterning and the second patterning. In various embodiments, a differential expansion compensation structure can be disposed on at least one of the first and the second semiconductor elements.
    Type: Grant
    Filed: May 22, 2024
    Date of Patent: June 24, 2025
    Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
    Inventors: Guilian Gao, Laura Wills Mirkarimi, Gaius Gillman Fountain, Jr., Cyprian Emeka Uzoh
  • Patent number: 12341103
    Abstract: An integrated circuit includes a first and second active region, a first conductive structure, an insulating region, a set of gates and a set of contacts. The first and second active region are in a substrate, extend in a first direction, are located on a first level, and being separated from one another in a second direction. The first conductive structure extends in the first direction, is located on the first level, and is between the first and second active region. The insulating region is located on at least the first level, and is between the first and second active region and the first conductive structure. The set of gates extend in the second direction, overlap the first conductive structure, and is located on a second level. The set of contacts extend in the second direction, overlap the first conductive structure, and is located on the second level.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: June 24, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pochun Wang, Ting-Wei Chiang, Chih-Ming Lai, Hui-Zhong Zhuang, Jung-Chan Yang, Ru-Gun Liu, Ya-Chi Chou, Yi-Hsiung Lin, Yu-Xuan Huang, Yu-Jung Chang, Guo-Huei Wu, Shih-Ming Chang
  • Patent number: 12341114
    Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a die-level interposer having a first surface and an opposing second surface; a first die coupled to the first surface of the die-level interposer by a first hybrid bonding region having a first pitch; a second die coupled to the second surface of the die-level interposer by a second hybrid bonding region having a second pitch different from the first pitch; and a third die coupled to the second surface of the die-level interposer by a third hybrid bonding region having a third pitch different from the first and second pitches.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: June 24, 2025
    Assignee: Intel Corporation
    Inventors: Georgios Dogiamis, Qiang Yu, Adel A. Elsherbini, Shawna M. Liff
  • Patent number: 12336100
    Abstract: A flexible printed circuit flex-PCB sensor includes a sheet of electronically printable flexible material, sensor cells printed on said sheet and each including a sensitive element and a circuit. Each sensitive element is arranged to measure a predetermined physical parameter and to obtain an associated measurement signal. Each circuit is arranged to receive and process the measurements signal in order to obtain a corresponding output signal. Communication means are arranged to transmit the digital signals coming from said sensor cells to a remote processing circuit. The sheet is coiled according to a three-dimensional shape having a layered structure. Layers of said sheet are placed side by side and form a sensing border that is substantially perpendicular to the surface of said sheet. The relative position of each sensitive element and of each circuit inside the sensor relative to said sensing border depends on their relative position thereof.
    Type: Grant
    Filed: January 17, 2023
    Date of Patent: June 17, 2025
    Assignee: FONDAZIONE ISTITUTO ITALIANO DI TECNOLOGIA
    Inventors: Simeon Asher Bamford, Ella Janotte, Chiara Bartolozzi
  • Patent number: 12334409
    Abstract: Provided is a semiconductor module, including: a semiconductor chip including a semiconductor substrate and a metal electrode provided above the semiconductor substrate; a protective film provided above the metal electrode; a plated layer provided above the metal electrode, having at least a part being in a height identical to the protective film; a solder layer provided above the plated layer; and a lead frame provided above the solder layer, wherein the plated layer is provided in a range not in contact with the protective film.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: June 17, 2025
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Yasufumi Hara
  • Patent number: 12336086
    Abstract: A high-frequency module includes a module substrate having a main surface, circuit components arranged on the main surface, a resin member covering at least a part of the main surface and the circuit components, a metallic shield layer covering at least an upper surface of the resin member, and a metallic shield plate arranged on the main surface and between the circuit component and the circuit component when the main surface is viewed in a plan view. The metallic shield plate is in contact with the metallic shield layer. An engraved mark portion indicating predetermined information is provided on the upper surface of the resin member. At least a part of the engraved mark portion is provided in a portion in which the resin member and the metallic shield plate overlap each other when the main surface is viewed in a plan view.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: June 17, 2025
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takanori Uejima, Hiromichi Kitajima, Takahiro Eguchi, Nobuaki Ogawa, Yuki Asano, Shota Hayashi
  • Patent number: 12328816
    Abstract: The present disclosure relates to a printed circuit board assembly including a first circuit board including a first footprint, the first circuit board further includes a plurality of first vertical vias extending between a first side and an opposing second side; a second circuit board including a second footprint smaller than the first footprint, the second circuit board further includes a plurality of second vertical vias extending between a subsequent first side and an opposing subsequent second side; an adhesive layer coupling the first side to the subsequent first side; and a plurality of third vertical vias extending through the first side and the subsequent first side.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: June 10, 2025
    Assignee: Intel Corporation
    Inventors: Jackson Chung Peng Kong, Bok Eng Cheah, Tin Poay Chuah, Jenny Shio Yin Ong, Seok Ling Lim
  • Patent number: 12328817
    Abstract: A flexible printed circuit board includes: a substrate; and a circuit pattern disposed on the substrate, wherein the substrate includes a chip mounting region, and the circuit pattern includes a wiring portion and a pad portion, wherein the circuit pattern includes: a first circuit pattern including a first-first pad portion disposed inside the chip mounting region, a first-second pad portion disposed outside the chip mounting region, and a first wiring portion that connects the first-first pad portion and the first-second pad portion, and extending in a first direction based on the chip mounting region; a second circuit pattern including a second-first pad portion disposed inside the chip mounting region, a second-second pad portion disposed outside the chip mounting region, and a second wiring portion that connects the second-first pad portion and the second-second pad portion, and extending in a second direction; and a third circuit pattern including a plurality of third pad portions disposed inside the ch
    Type: Grant
    Filed: June 28, 2023
    Date of Patent: June 10, 2025
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Eon Jong Lee, Dong Chan Kim, Ki Tae Park