Abstract: An optical disk changer that is capable of automatically playing both sides of a dual-sided optical disk. By coordinated delivery of disks between a disk reader, a disk transfer mechanism, or a disk turner and a carrousel that is approximately toroid shaped, both sides of a dual-sided optical disk can be automatically accessed.
Abstract: A built-in self-test (BIST) apparatus and method for testing an integrated circuit are disclosed which enable capture of failure data for a selected failure. The BIST apparatus comprises a clock generator, which generates at least a first clock signal, and a built-in self-tester, which applies predetermined input data patterns to the integrated circuit in response to the first clock signal. In addition, the BIST apparatus includes a data comparator for comparing output data received from the integrated circuit with expected output data. The data comparator detects a failure within the integrated circuit when the output data received from the integrated circuit differs from the expected output data. The BIST apparatus further includes a clock controller that disables the first clock signal in response to the detection of a selected occurrence of a failure.
Type:
Grant
Filed:
March 24, 1997
Date of Patent:
June 15, 1999
Assignee:
International Business Machines Corporation
Inventors:
R. Dean Adams, Michael R. Ouellette, Ronald J. Prilik
Abstract: A digital microprocessor having a processor core is provided with trace recording hardware capable of receiving, analyzing and temporarily storing data indicative of program instructions (i.e., instruction types) executed by the processor core and of their respective addresses. The trace recording hardware outputs an abbreviated real-time program trace, containing minimum data necessary to reconstruct a full program trace, via a JTAG port to an external debug host computer where a user may reconstruct the full program trace with reference to a program listing. The abbreviation scheme used by the trace recording hardware is preferably achieved by comparing instruction types received from the processor core to at least one pre-defined instruction type, and abbreviating or discarding the corresponding address information as a function of the particular instruction type. The trace recording hardware may be set into one of two modes by the user.
Type:
Grant
Filed:
May 15, 1996
Date of Patent:
March 3, 1998
Assignee:
Lucent Technologies Inc.
Inventors:
Pramod Vasant Argade, Michael Richard Betker, Shaun Patrick Whalen
Abstract: This present invention provides a comparison circuit where the close limitation of the strobe timing is modified and the setting margin of the strobe timing is increased for semiconductor testing apparatuses.