Patents Examined by Hoang-Vu Anthony Nguyen-Ba
  • Patent number: 7203745
    Abstract: A method of and system for managing installs to a set of one or more field machines in a distributed network environment. In an illustrative embodiment, the system includes at least one change coordinator server that includes a database with data identifying a current state of each field machine, and a change controller routine for initiating a given control action to initiate an update to the current state on a given field machine. In particular, the change controller routine may include a scheduling algorithm that evaluates data from the database and identifies a set of field machines against which the given control action may be safely executed at a given time. At least one install server is responsive to the change controller routine initiating the given control action for invoking the update to the current state on the given field machine.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: April 10, 2007
    Assignee: Akamai Technologies, Inc.
    Inventors: Justin J. Sheehy, F. Thomson Leighton
  • Patent number: 6718535
    Abstract: A system and method are provided for providing an activity framework. First, a plurality of sub-activities are created which each include sub-activity logic adapted to generate an output based on an input received from a user upon execution. Second, a plurality of activities are defined which each execute the sub-activities in a unique manner upon being selected for accomplishing a goal associated with the activity. Selection of one of the activities is allowed by receiving user indicia. An interface is depicted for allowing receipt of the input and display of the output during execution of the sub-activities associated with the selected activity.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: April 6, 2004
    Assignee: Accenture LLP
    Inventor: Roy Aaron Underwood
  • Patent number: 6675378
    Abstract: An object oriented mechanism and method allow allocating Java array objects of unknown size at compile time to a method's invocation stack if the array's size is less than a predetermined threshold value. If the array object could typically be allocated to the invocation stack if it were of a known size at compile time, run-time code is generated that examines the actual size of the array object at run-time and that allocates the array object to the invocation stack if the size is less than a predetermined threshold value. In this manner Java array objects that have an unknown size at compile time may still be allocated to an invocation stack at run-time if the size of the object is sufficiently small.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: January 6, 2004
    Assignee: International Business Machines Corporation
    Inventor: William Jon Schmidt
  • Patent number: 6658642
    Abstract: A system, method and program product for computer program development. A new computer program to be developed is outlined and the outline organized to identify required modules. Required modules are provided to the system, which categorizes them and posts a list of required modules with corresponding requirements on, for example, a dedicated web site. Module requirements may include module specifications, a corresponding price and a deadline. Software developers intending to participate may provide an intention to submit. If fewer than two developers intend to submit module candidates for one or more required modules, the computer program outline may be reorganized to encourage more participants. For each required module where at least two module candidates are received, the candidates are tested for compliance with corresponding module requirements.
    Type: Grant
    Filed: June 21, 2000
    Date of Patent: December 2, 2003
    Assignee: International Business Machines Corporation
    Inventors: Nimrod Megiddo, Xiaoming Zhu
  • Patent number: 6622301
    Abstract: When converting a sequential execution source program into a parallel program to be executed by respective processors (nodes) of a distributed shared memory parallel computer, a compiler computer transforms the source program to increase a processing speed of the parallel program. First, a kernel loop having a longest sequential execution time is detected in the source program. Next, a data access pattern equal to that of the kernel loop is reproduced to generate a control code to control first touch data distribution. The first touch control code generated is inserted in the parallel program.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: September 16, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hirooka, Hiroshi Ohta, Takayoshi Iitsuka, Sumio Kikuchi
  • Patent number: 6560774
    Abstract: Verification of intermediate language code. In one embodiment, a computer-implemented method first verifies metadata of an intermediate language code for consistency and accuracy, and then verifying the intermediate language code for consistency and accuracy. This latter part in one embodiment is accomplished by performing first a syntactic check of the intermediate language code, and then a semantic check of the intermediate language code.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: May 6, 2003
    Assignee: Microsoft Corporation
    Inventors: Andrew Gordon, Donald Syme, Jonathon Forbes, Vance P. Morrison
  • Patent number: 6496978
    Abstract: Programs or data in a mask ROM incorporated in a one-chip microcomputer can be modified from the outside. With version information appended to each of a mask ROM 2 incorporated in a one-chip microcomputer 6 and an external EPROM 5, by comparing the version numbers, programs (tasks and subroutines) of a new version can always be executed and update data of a new version can be used. The programs can be customized for each user.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: December 17, 2002
    Assignee: Hitachi, Ltd.
    Inventor: Tamotsu Ito
  • Patent number: 6446255
    Abstract: The system, method, and program of this invention enables a developer to write a platform independent program that can read, create, modify, delete, and enumerate registry type of information regardless of whether or not a targeted operating system supports a registry or registry equivalent functionality. More specifically, as disclosed herein, in a first preferred embodiment, there is a global registry object for carrying out, i.e., mapping, registry functions or registry equivalent functions across multiple operating systems. In a second preferred embodiment, the global registry object is used to read, create, modify, delete, and enumerate registries for the Windows operating system in a simplified manner. In a third preferred embodiment, the global registry object is used to map registry equivalent functions in an OS/2 operating system environment. In a fourth preferred embodiment, the global registry is used to map registry equivalent functions in an AIX operating system environment.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: September 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Bryce Allen Curtis, Jimmy Ming-Der Hsu
  • Patent number: 6434737
    Abstract: A method for programming an application function through connection of a plurality of event-driven-type function blocks each composed of a data processing block and an event processing block. The method comprises a first processing step and a second processing step. When a first data signal line is set in order to establish a connection between first and second event-driven-type function blocks, the first processing step is performed in order to set a first variable area corresponding to the established connection and adapted for data transfer. In the second processing step, a pointer for pointing to the first variable area is allocated to each of the first and second event-driven-type function blocks so that the first and second event-driven-type function blocks output data to and input data from the first variable area.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: August 13, 2002
    Assignee: Yamatake Corporation
    Inventors: Yosuke Nishi, Hirotsugu Tsunematsu, Takashi Mishima
  • Patent number: 6412109
    Abstract: A method for optimizing bytecode in the presence of try-catch blocks comprises generating an Intermediate Representation of the bytecode, scanning each basic block of the bytecode to identify try blocks, scanning each basic block of the bytecode to identify try-blocks, splitting each try-block into a first half and a second half at the first statement that can throw an exception, establishing an edge between the first half and the second half of each try-block, between the first half and the catch block, and between the catch block and the basic block subsequent to the second half of each try-block.
    Type: Grant
    Filed: January 29, 1999
    Date of Patent: June 25, 2002
    Assignee: Sun Microsystems, Inc.
    Inventor: Sanjoy Ghosh
  • Patent number: 6408430
    Abstract: A method for visualizing and testing a sequence of a software code that includes instructions relating to assignment of variables, and decision branches. The method comprises the steps of generating a plurality of nodes, edges and text indications that correspond to the instructions in the software code. A plurality of pointers are then generated to associate the location of at least one line of the software code to at least one of the generated nodes. The pointers may also associate the location of a line in the software code to at least one of the generated edges. The method then displays a flow chart representing the generated nodes, and edges and text indications, so that the software code can be visualized. When a user selects a node or an edge in the displayed flow chart, a corresponding portion of the software code is also identified.
    Type: Grant
    Filed: September 3, 1998
    Date of Patent: June 18, 2002
    Assignee: Lucent Technologies, Inc.
    Inventors: Elsa L. Gunter, Doron A. Peled
  • Patent number: 6343377
    Abstract: A system and method for manifesting content received via the Internet by an automatic data processing system includes and involves a content retrieval module for retrieving content from the Internet. The content is arranged to be manifested by the automatic data processing system. Also included and involved is a content manifestation module that is coupled to the content retrieval module. The content manifestation module is operable to receive a replaceable software delegate during its operation, and to manifest the content within the automatic data processing system in accordance with the replaceable software delegate. The replaceable software delegate controls the manifestation of the content by the content manifestation module.
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: January 29, 2002
    Assignee: Netscape Communications Corp.
    Inventors: Rick Gessner, Peter S. Linss, Kipp E. B. Hickman, Troy Chevalier
  • Patent number: 6332212
    Abstract: A software tool for analyzing the real-time performance characteristics of computer programs. A subprogram automatically records the execution time at a large number of pre-identified points in the code to be analyzed. This time information is captured in real-time and is minimally invasive. The display is subsequently displayed using a timing diagram display tool for a graphical user interface. The displayed timing diagrams provides a visual representation of the execution of the software in time, and provides a user to scale the time or show the profile in an alternate perspective. The present invention further provides a graphical representation of the hierarchical execution of subroutines and program modules within the software by displaying the nested execution of the software.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: December 18, 2001
    Assignee: LTX Corporation
    Inventors: Donald V. Organ, Mark E. Deome, Rajaneekara Techasaratoole, Val N. Greene
  • Patent number: 6298474
    Abstract: A method, a system and a computer-readable storage medium having stored therein a program for interactively developing a graphical control-flow structure and associated application software for use in a machine vision system is provided. The structure is a tree view structure including a control sequence having at least one node. The method includes providing a first set of control programs representing possible machine vision tasks. The first set of control programs defines a first set of standard controls. Hardware operating parameters are provided which correspond to possible hardware. The hardware operating parameters defining a second set of standard controls. Graphical representations of possible hardware and possible machine vision tasks are displayed. Commands are received from a user to select desired hardware operating parameters corresponding to desired hardware and a machine vision graphical representation and its associated first control program corresponding to a desired machine vision task.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: October 2, 2001
    Assignee: Intergral Vision, Inc.
    Inventors: Andrew Blowers, Jiri G. Culik, Steven F. Prehn
  • Patent number: 6282700
    Abstract: The inventive state mechanism assigns N+1 tags to N versions of an object stored in N memory areas. Thus, one tag is unused. An additional tag is used as a null or uninitialized tag. The other tags are assigned in a particular precedence order to revisions as they are stored. Thus, each assigned tag, except the null tag, has both a unique predecessor as well as a unique successor tag. The last tag of the sequence is lower in precedence to the first tag of the sequence, and this forms the cyclic relationship. The unused tag is used to determine the tag that is to be assigned to the next revision. The unused tag is also used to determine which revision is the most current revision. The inventive state mechanism is used by a memory management controller in maintaining the revisions.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: August 28, 2001
    Assignee: Hewlett Packard Company
    Inventors: Rajiv K. Grover, Thomas A. Keaveny
  • Patent number: 6253372
    Abstract: To generate an optimum communication schedule when data is transmitted or received between processors which constitute a parallel computer or a distributed multiprocessor system. Processors which each perform inter-processor communication are sorted into a plurality of groups. A communication graph is generated whose nodes correspond to the groups and edges correspond to the communications. Communication graphs are generated for distances between nodes from one through N−1. Each communication graph corresponds to a communication step of the inter-processor communication. Communication is grasped as a whole by the communication graph and the edge of the communication graph means the inter-processor communication which is performed in a certain communication step. In this way, the communication can be optimized.
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: June 26, 2001
    Assignee: International Business Machines Corporation
    Inventors: Hideaki Komatsu, Takeshi Ogasawara
  • Patent number: 6243857
    Abstract: A machine control system (130) includes a computer (132) that generates, edits and displays a continuous multi-block flowchart representing a program and compiles the program from the flowchart to control the operations of a machine (140). The system (130) also includes a debugger (146) for displaying the flowchart in a debugger window (170) for runtime execution control of the program.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: June 5, 2001
    Assignee: NemaSoft, Inc.
    Inventors: Frank G. Logan, III, Kenneth W. Bunch, Teddy Martin Davis, Jeffrey M. Achesinski
  • Patent number: 6237137
    Abstract: A system and method for preventing a program from being run under a debugger utility program. The method is part of a routine which is stored along with a software program on a hard drive of a computer system. The computer system has a processor for running both the software program and the routine and is capable of operating in a debug mode. The routine prevents unauthorized access to the software program, such as when the processor is running in the debug mode. When the processor is running the software program, the program can initiate execution of the routine. Once initiated, the routine checks a certain registers of the processor to determine if it is operating in the debug mode and if so, stops the processor from continuing to run the software program.
    Type: Grant
    Filed: October 15, 1997
    Date of Patent: May 22, 2001
    Assignee: Dell USA, L.P.
    Inventor: Alan E. Beelitz
  • Patent number: 6230319
    Abstract: A World Wide Web browser software is implemented in a processing system housed in a set-top box connected to a television and communicating over a wide-area network with one or more servers. The browser software allows a user to navigate using a remote control through World-Wide Web pages in which a number of hypertext anchors are displayed on the television. User inputs are entered from a remote input device using an infrared (IR) link. The processing system includes a read-only memory (ROM) and a flash memory. The mask ROM and the flash memory are assigned adjacent memory spaces in the memory map of the processing system. Browser software and configuration data are stored in the flash memory. Other software and configuration data are stored in a mask ROM. The browser is upgraded or reconfigured by downloading to the box replacement software or data transmitted from a server over the network and then writing the replacement software or data into the flash memory.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: May 8, 2001
    Assignee: WebTV Networks, Inc.
    Inventors: Joe F. Britt, Jr., Andrew T. McFadden, Phillip Y. Goldman, Bruce A. Leak
  • Patent number: 6149318
    Abstract: A programming language processor performs link-time and run-time error checking of a program written in C, C++, or a combination of both. The link-time error checking diagnoses violations of the C++ One Definition Rule, and its equivalent in C. As the program runs, the run-time error checking examines accesses to computer memory to determine that the addresses accessed contain values of che type expected by the program. To add instrumentation to a C or C++ program, pre-expressions, post-expressions and clone-expressions are used to annotate an abstract syntax tree, the annotated tree is then canonicalized into a more traditional syntax tree before a back-end generates code for the program.
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: November 21, 2000
    Assignee: Samuel C. Kendall
    Inventors: David R. Chase, Samuel C. Kendall, Mark Patrick Mitchell