Patents Examined by Hoang-Vu Antony Nguyen-Ba
  • Patent number: 6289509
    Abstract: A system for generating a patch file from an old version of computer code which consists of a series of elements and a new version of computer code which also consists of a series of elements. Both the old and new versions of computer code are stored in a memory of a computer. An alphabet for processing the old and new versions of computer code is programmed into the computer and, once established, the old version of computer code is sorted with the data processor alphabetically according to the established alphabet to create a first sorted list of code. A pointer is maintained in order to indicate each element's original location in the old version of computer code. Similarly, the new version of computer code is also sorted alphabetically to create a second sorted list of code with a pointer of each element to indicate the element's original location in the new version of computer code.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: September 11, 2001
    Assignee: PKWare, Inc.
    Inventor: Sergey A. Kryloff
  • Patent number: 6289503
    Abstract: When building an image for a JavaOS client, a date/time stamp is inserted into the symbolic image produced. When a trace program is initiated against this image, the same Build Identifier is inserted into the produced trace data. A comparison is made between the Build Identifiers to ensure that the trace file is analyzed using the correct symbolic image.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: September 11, 2001
    Assignee: International Business Machines Corporation
    Inventors: Robert Francis Berry, Riaz Y. Hussain, Chester Charles John, Jr., Frank Eliot Levine
  • Patent number: 6289510
    Abstract: There is provided an online program-updating system which is capable of updating contents of a program without interrupting any services provided by the system. A management information storage section stores management information including operative status flags each indicative of the operative status of a corresponding program module and information of a version number associated with the corresponding program module. A program execution section updates operative status flags based on the operative statuses of the program modules. A version number check section makes a comparison between the version number of each program module of a revised program and that of each program module of the existing program in response to a download request, and determines that an update of the program is required, if the version number of the program module of the revised program is newer.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: September 11, 2001
    Assignee: Fujitsu Limited
    Inventor: Ryoetsu Nakajima
  • Patent number: 6289511
    Abstract: A method and system of a computer network enables efficient and reliable software distribution by disbursing the responsibility for loading software. A computer network is composed of, for example, a central managing station (CMS), multiple major network elements (NEs), and possibly multiple subordinated NEs (S-NEs) connected to major NEs. The CMS and the NEs are preferably connected to a network, such as an X.25 network. The CMS includes a load manager (LM) and at least one software unit to be distributed to multiple NEs and/or S-NEs. Multiple NEs include a load agent (LA), which aids the LM with software distribution. At least one particular LA receives instructions as well as the software unit from the CMS under control of the LM and via the network. The particular LA is then responsible for loading the software unit onto other NEs, either fully or partially. The process of upgrading and/or installing software is therefore delegated and disbursed between and among multiple NEs.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: September 11, 2001
    Assignee: Telephonaktiebolaget LM Ericsson
    Inventor: Ulf Hübinette
  • Patent number: 6286129
    Abstract: A system, method, and article of manufacture is provided for compiling visual primitives of a transaction flow used by a transaction processing system. Visual primitives of the transaction flow are compiled into multiple routing instructions, which may be stored in a routing table. The routing instructions are then provided to the transaction processing system. The routing instructions are stored in a database contained in the transaction processing system. The routing table is converted into a native language of the transaction processing system. The system is also capable of accessing a series of routing instructions from a transaction processing system, compiling the routing instructions into visual primitives of the transaction flow, and displaying the visual primitives of the transaction flow on a visual display.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: September 4, 2001
    Assignee: Aspect Communications
    Inventors: Suresh K. Agarwal, Roy S. Ho, Rosemary Glavin, Sophia Fang-Jung Liu
  • Patent number: 6286137
    Abstract: A method and apparatus for compensating for deficiencies existing in programs to assist a user through installing a program. Polling the status of jobs requested by the user of a workstation is done so that the user may eventually be provided with status reports regarding the jobs being executed. The user can set parameters during loading of SMPE libraries, install, migrate, fallback, remigrate and update procedures for the program. An indication is provided to a user of a workstation as steps of a task have been completed by the user. The health of catalog and directory databases may be verified before a migrate procedure is performed. The user of the program can be informed regarding parameters whose default values have changed, which parameters are of particular concern to the specific user.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: September 4, 2001
    Assignee: International Business Machines Corporation
    Inventors: Terry M. Bleizeffer, Nathan D. Church, Kathryn W. Devine, Virginia W. Hughes, Jr., Barbara J. Kilburn, David E. Shough
  • Patent number: 6286133
    Abstract: A method and apparatus which, as part of a compiler, supporting the generation of code in two (or more) target languages. The selection of the target language, and the program structure in that target language, is made depending on the capabilities of each target language, in a separate processing pass. Runtime efficiency is also improved by allowing selection of the most appropriate target language and program structure for a particular source code function.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: September 4, 2001
    Assignee: International Business Machines Corporation
    Inventor: Trevor Paul Hopkins
  • Patent number: 6282697
    Abstract: A computer processing and programming method calls for creating a plurality of software entities (“molecules”) which can be dynamically configured to process data autonomously. The molecules can send and receive signals indicating the state of a molecule, whether or not a processing task is fulfilled, the results of a processing task, and whether or not the operation of a molecule is to be terminated, interrupted, reconfigured, or continued by creation of one or more “next” molecules. The molecules are created from a common set of software micro-components, which may be programmed in any programming languages to run in any operating system environments. The molecules may reside with a single computing resource, however, they are ideally suited to be deployed with distributed computing resources of different types on a network or in a parallel processing environment.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: August 28, 2001
    Inventors: Wylci Fables, Jore Park
  • Patent number: 6282702
    Abstract: A method and apparatus of translating and executing native code in a virtual machine environment. Debugging of a virtual machine implementation is made easier through binary translation of native code, which permits greater platform independence and greater control over thread management and scheduling, and provides for identification of memory access errors in the native code. When native code is to be executed within a virtual machine environment, the native code is translated into an intermediate form. This intermediate form is processed to determine where memory access and blocking system calls occur. Validity checks are inserted into memory access calls to determine whether the portion of memory to be accessed by each call is within a permitted range. Wild pointers and other resources of memory access errors associated with the native code may thus be identified. Blocking system calls are replaced with non-blocking variants, and “yield” operations may be inserted into system calls and loops.
    Type: Grant
    Filed: August 13, 1998
    Date of Patent: August 28, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: David Ungar
  • Patent number: 6279152
    Abstract: When a processing unit of a vector computer detects an optimization directive line for optimizing a list accessing method during the compilation, an access method is automatically changed according to an instruction of the directive line. For example, data to be accessed are copied to a work array, the access order is changed at random, and a scalar load process is performed. As a result, high-speed list access can be realized without a bank conflict at a vectorization.
    Type: Grant
    Filed: June 4, 1998
    Date of Patent: August 21, 2001
    Assignee: Fujitsu Limited
    Inventors: Masaki Aoki, Masahito Morishima
  • Patent number: 6275987
    Abstract: Completion times for a set of subtasks, which are performed without interaction with a main task managing execution of the subtasks, are estimated. These estimated completion times, together with actual completion times for previously performed subtasks, are employed to determine a time interval at which a progress indicator is incrementally advanced. The progress indicator is then advanced at the calculated rate concurrently with performance of a current subtask. By adjusting for actual completion times of previously completed subtasks, compensation and correction for overestimation or underestimation of subtask completion times allows the progress indicator to adapt appropriately. The advance rate may also be dynamically adjusted to compensate for underestimation of the completion time for a current subtask.
    Type: Grant
    Filed: November 5, 1998
    Date of Patent: August 14, 2001
    Assignee: International Business Machines Corporation
    Inventors: Brad James Fraley, Ira H. Schneider
  • Patent number: 6266811
    Abstract: A method and system for custom computer software installation using a standard rule-based installation engine is disclosed. Custom installation parameters are translated into a simplified script language file by a system administrator. An application software package is installed onto a computer using the standard rule-based installation engine, which is executed normally according to commands stored in a rule-based instruction file. The rule-based instruction file has been configured by the provider of the application software package to cause the rule-based installation engine to execute commands according to the simplified script language file. In this manner, the system administrator may achieve flexibility and control over each phase of the software installation process without being required to have a knowledge of the specific language of the rule-based instruction file.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: July 24, 2001
    Assignee: Network Associates
    Inventor: Narimane Nabahi
  • Patent number: 6263494
    Abstract: In a parallel processor, a local area and an overlap area are assigned to the memory of each processing element (PE), and each PE makes calculations to update the data in both areas at the runtime. If the data in the overlap area is updated in processes closed in the PEs, the data transfer between adjacent PEs can be reduced and the parallel processes can be performed at a high speed.
    Type: Grant
    Filed: February 20, 1998
    Date of Patent: July 17, 2001
    Assignee: Fujitsu Limited
    Inventor: Tatsuya Shindo
  • Patent number: 6260187
    Abstract: The system receives three sets of inputs: program class definitions, a set of rules, and additional class definitions to be merged with the program class definitions. There are three types of rules: the first rule is used to substitute the allocation of an object of a new class for the allocation of the object based on an original class; the second rule is used to change code that allocates an object of an original class to code that calls a static method that allocates the object of the original class; and the third rule is used to a replace a new static field for an original static field. The system separately reads each of the original class definitions into a class data structure and performs the modifications to the class data structure according to the set of rules. The resulting class data structure is written to an output stream.
    Type: Grant
    Filed: August 20, 1998
    Date of Patent: July 10, 2001
    Assignee: Wily Technology, Inc.
    Inventor: Lewis K. Cirne
  • Patent number: 6256783
    Abstract: The present invention introduces an object conversion apparatus with both advantages of the dynamic object conversion and advantages of the static object conversion. In the object conversion apparatus, an application program to be converted is divided into some blocks, and a page table is provided in order to specify whether each block is processed by the dynamic object conversion or the static object conversion. Based on the information specified in the page table, an instruction in the block used with high frequency is processed with the dynamic object conversion, and an instruction in the block used with low frequency is processed with the static object conversion.
    Type: Grant
    Filed: August 10, 1998
    Date of Patent: July 3, 2001
    Assignee: Fujitsu Limited
    Inventors: Mikayo Wada, Shigenori Koyata, Mitsuo Sakurai
  • Patent number: 6256784
    Abstract: The present invention provides an interpreter with reduced memory access and improved jump-through-register handling. In one embodiment, a method includes storing a handler for a bytecode in a cell of a predetermined size of a table, and generating an address of the handler for the bytecode using a shift and an ADD operation. In particular, the handler address is generated by adding a base address of the table and an offset into the table. In another embodiment, a method includes prefetching a target handler address for providing improved jump-through-register handling.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: July 3, 2001
    Assignee: ATI International SRL
    Inventor: Daniel D. Grove
  • Patent number: 6253374
    Abstract: Validating a signed program prior to execution time or an unsigned program at execution time. A program is validated by checking the input parameters to the instructions of the program to prevent errors associated with executing an instruction using an invalid input parameter. Both signed programs and unsigned programs are accommodated. A signed program is validated during the signing process, whereas an unsigned program is validated at execution time.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: June 26, 2001
    Assignee: Microsoft Corporation
    Inventors: Bodin Dresevic, Donald D. Chinn, Gregory C. Hitchcock
  • Patent number: 6249910
    Abstract: An improved technique for incrementally updating a source code representation having cloned variable name definitions to static single assignment (SSA) form is described. The technique receives an intermediate representation of a source program in non-SSA form having one or more cloned variable name definitions that correspond to an original variable name. All the original variable names and their corresponding cloned variable names are collected. An iterative dominance frontier set for those nodes containing a cloned variable name definition or an original variable name definition is formed. This iterative dominance frontier set is then used to determine the nodes in which a single phi-function is inserted for each original variable name. Each use of an original variable name is changed to the cloned variable name that reaches the use. The arguments of the inserted phi-functions are then updated with the cloned variable names that reach the inserted phi-functions.
    Type: Grant
    Filed: May 4, 1998
    Date of Patent: June 19, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Dz-ching Ju, David Mitford Gillies, A. V. S. Sastry
  • Patent number: 6249907
    Abstract: Disclosed is a system for debugging a computer program. A user indicates a specified breakpoint type, such as a program statement, variable reference, command, etc. The program, including program statements, is then compiled. During compilation, the compiler locates statements in the program corresponding to the breakpoint types and generates a function call into the program at instances in the program of statements corresponding to the user specified breakpoint types. During a debugging phase, a debugger may execute an executable version of the program, including the function calls. Upon processing the function calls, the debugger may stop execution of the program and pass control to the user to perform debugging operations.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: June 19, 2001
    Assignee: International Business Machines Corporation
    Inventors: Derek Kneil Carter, Ronald Wessels, Della Ann Yukihiro
  • Patent number: 6247172
    Abstract: A translating software emulator designed for converting code from a legacy system to a target system and fully preserving the synchronous exception state while still allowing for full and aggressive optimization in the translation. A user application is translated to a target system using full optimization techniques. The translation may be done dynamically by an emulator emulating the legacy system on the target system, or the translation may be a static translation or a compilation, fully generating a new executable program operable on the target system. The invention recovers from the exception properly by restoring the target machine state to the machine state expected by the legacy system. This recovery is done by using an exception delivery mechanism to restore the machine state of the target system before executing the exception handling code.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: June 12, 2001
    Assignee: Hewlett-Packard Company
    Inventors: David A. Dunn, William B. Buzbee