Abstract: A multi-phase interleaved PFC converter includes at least six switches coupled in a multi-phase interleaved circuit arrangement, and a control circuit. The control circuit is configured to turn on and turn off a first one of the switches according to a PWM signal to operate the first switch as an active switch having an off-time as a function of a duty cycle of the PWM signal, while turning on and turning off a second one of the switches as a synchronous switch. The control circuit is also configured to receive signal(s) indicative of currents in each phase of the interleaved circuit arrangement, set an on-time of the second switch equal to the off-time of the first switch when the signal(s) indicate continuous mode operation, and set the on-time of the second switch to a duration less than the off-time of the first switch when the signal(s) indicate discontinuous mode operation.

Abstract: A bulk-acoustic wave resonator may include: a substrate; a resonance portion; a first electrode disposed on the substrate; a piezoelectric layer disposed on the first electrode in the resonance portion; a second electrode disposed on the piezoelectric portion in the resonance portion; and a seed layer disposed in a lower portion of the first electrode. The seed layer may be formed of titanium (Ti) having a hexagonal close packed (HCP) structure, or an alloy of Ti having the HCP structure. The seed layer may have a thickness greater than or equal to 300 ? and less than or equal to 1000 ?, or may be thinner than the first electrode.

Abstract: A resonant switching power converter includes: at least one capacitor; switches coupled to the at least one capacitor; at least one charging inductor; at least one discharging inductor; and a zero current estimation circuit. The switches switch electrical connection relationships of capacitors according to an operation signal. The zero current estimation circuit estimates a time point at which a charging resonant current is zero during a charging process and/or estimate a time point at which a discharging resonant current is zero during at least one discharging process according to voltage differences across two ends of the charging inductor and/or the discharging inductor, so as to correspondingly generate a zero current estimation signal. The zero current estimation signal is adopted to generate the operation signal.

Abstract: A micro-electrical-mechanical system (MEMS) guided wave device includes a single crystal piezoelectric layer and at least one guided wave confinement structure configured to confine a laterally excited wave in the single crystal piezoelectric layer. A bonded interface is provided between the single crystal piezoelectric layer and at least one underlying layer. A multi-frequency device includes first and second groups of electrodes arranged on or in different thickness regions of a single crystal piezoelectric layer, with at least one guided wave confinement structure. Segments of a segmented piezoelectric layer and a segmented layer of electrodes are substantially registered in a device including at least one guided wave confinement structure.

Abstract: This application provides a photovoltaic power generation system. The system includes at least one first photovoltaic module, a photovoltaic inverter, a first two-way DC/DC converter, and at least one first energy storage unit, and further includes at least one second photovoltaic module or at least one second energy storage unit. The photovoltaic inverter includes a DC/DC converter and a DC-AC inverter, where the DC/DC converter is electrically connected to the at least one first photovoltaic module, and the DC/DC converter is connected to the DC-AC inverter through a direct current bus. For the photovoltaic power generation system, photovoltaic arrays and energy storage devices can be configured flexibly to cope with peaks and troughs of power consumption.

Abstract: An electric motor having a permanent magnet and a compressor including an electric motor are provided. The electric motor may include a stator; and a rotor rotatably disposed and spaced a predetermined gap apart from the stator. The rotor may include a rotational shaft, a permanent magnet arranged concentrically to the rotational shaft, and a permanent magnet support that supports the permanent magnet. The permanent magnet may have a cylindrical shape and be magnetized to have polar anisotropy such that a magnetic field is formed on the magnet's surface facing the gap but is not formed on the magnet's surface opposite to the gap. The permanent magnet support may be configured to form no flux path in the permanent magnet and connect the rotational shaft to the permanent magnet. Thus, the rotor has a reduced weight with consequent suppression of vibration and noise.

Abstract: A method can be used to synchronize time between nodes of a converter device for high voltage power conversion. The method is performed in a first node of the converter device and includes receiving a time reference from a second node of the converter device, obtaining a delay value for receiving time references from the second node, determining a compensated time by adding the delay value to the time reference, and setting a clock in the first node to be the compensated time.

Abstract: An electric motor includes a stator assembly including a lamination stack, a printed circuit board assembly (PCBA), and a plurality of windings. The PCBA is coupled to the lamination stack at a first axial end of the stator assembly. The windings are wrapped about the lamination stack to form coils. Each winding includes crossover portions extending about a portion of a circumference of the stator assembly to connect pairs of opposite coils. The crossover portions are located at a second axial end of the stator assembly opposite the first axial end.

Abstract: A power converter includes a rectifier configured to rectify an AC voltage supplied from an AC power supply, a booster circuit configured to boost the voltage rectified by the rectifier, a smoothing capacitor configured to smooth the voltage output from the booster circuit, a power module configured to convert a DC voltage obtained by smoothing the output voltage by the smoothing capacitor into an AC voltage, and a snubber capacitor configured to absorb a surge voltage superimposed on the DC voltage to be input to the power module. The snubber capacitor is mounted in the power module.

Abstract: The present invention discloses a power factor correction circuit. The power factor correction circuit includes: a first bridge arm having a first switch and a second switch; a second bridge arm having a third switch and a fourth switch; a first inductor and a second inductor; a first capacitor and/or a second capacitor connected with a common point between the second inductor and the first inductor; and a third capacitor and/or a fourth capacitor, the third capacitor connected in parallel to the third switch based on an arrangement of the second capacitor and having a capacitance value same as that of the second capacitor, the fourth capacitor connected in parallel to the fourth switch based on an arrangement of the first capacitor and having a capacitance value same as that of the first capacitor.

Abstract: A micro-electrical-mechanical system (MEMS) guided wave device includes a piezoelectric layer including multiple thinned regions of different thicknesses each bounding in part a different recess, different groups of electrodes on or adjacent to different thinned regions and arranged for transduction of lateral acoustic waves of different wavelengths in the different thinned regions, and at least one bonded interface between the piezoelectric layer and a substrate. Optionally, a buffer layer may be intermediately bonded between the piezoelectric layer and the substrate. Methods of producing such devices include locally thinning a piezoelectric layer to define multiple recesses, bonding the piezoelectric layer on or over a substrate layer to cause the recesses to be bounded in part by either the substrate or an optional buffer layer, and defining multiple groups of electrodes on or over the different thinned regions.

Abstract: A system and a method for power conversion. The system includes a rectifier; an inverter; a DC-link capacitor coupled between the rectifier and the inverter; and a controller. The controller is configured to obtain a current value at an output of the inverter and a voltage value across the DC-link capacitor, determine an average component and a fluctuating component of an output voltage of the inverter based on the obtained current value and the voltage value, and determine a current reference for controlling the rectifier based on the average component and the fluctuating component of the output voltage.

Abstract: A control method for a power factor correction circuit is disclosed. The power factor correction circuit includes a first bridge arm, a second bridge arm, an output capacitor and an active clamp unit. The control method includes steps of providing a first driving waveform to control a main switch, providing a second driving waveform to control an auxiliary switch, and providing a third driving signal to control a fifth switch. A first delay time is between the turning-off time point of the third driving signal and the turning-on time point of the first driving waveform, a second delay time is between the turning-on time point of the first driving waveform and the turning-off time point of the second driving waveform, and a third delay time is between the turning-off time point of the second driving waveform and the turning-on time point of the third driving signal.

Abstract: It is presented a power converter for transferring electric power provided on an input terminal to an energy storage element. The power converter comprises: an inductor; a switch connected to selectively control a connection between the inductor and the input terminal; and a comparator, wherein an output of the comparator controls the switch, a first input of the comparator is supplied with a voltage being proportional to a voltage of the input terminal, and a second input of the comparator is supplied with a voltage being proportional to a current from the input terminal; wherein the energy storage element is connected to a point between the inductor and the switch.

Abstract: A power control semiconductor device includes a voltage control transistor, a control circuit, a bias circuit, and external terminals. The voltage control transistor is connected between a voltage input terminal and an output terminal. The bias circuit generates a voltage that operates the control circuit. Output control signals provided from an outside are input to the external terminals to control an output voltage. The control circuit includes an error amplifier and a logic circuit. The error amplifier outputs a voltage corresponding to a potential difference between a reference voltage and a voltage divided by a voltage divider that divides the output voltage. The logic circuit generates: a signal that changes the divided voltage in accordance with the output control signals; and a signal that stops operation of the bias circuit in response to a combination of the output control signals.

Abstract: A power stage includes a power converter having high- and low-side switches, a driver circuit that drives the switching power converter based upon a PWM signal, and a current sensing circuit that detects a low-side current level on the low-side switch, and provides a current level signal that includes the low-side current level. The power stage turns on the low-side switch at a first time, and estimates a first low-side current level at the first time. In estimating the first low-side current level, the power stage detects a second low-side current level at a second time while the low-side switch is turned on, the second time being after the first time, and detects a third low-side current level at a third time while the low-side switch is turned on, wherein the third time is after the second time. The first low-side current level is estimated based upon the second and third low-side current levels.

Abstract: A power converter according to an embodiment is provided with first to fourth modules, first and second clamp diodes, and first and second buses. The first bus has a first main portion and a first standing portion provided in the first main portion. The first main portion electrically connects the first switching module and the second switching module, and is electrically connected to the first clamp diode. The second bus has a second main portion and a second standing portion provided in the second main portion. The second main portion electrically connects the third switching module and the fourth switching module, and is electrically connected to the second clamp diode. The second standing portion faces the first standing portion.

Abstract: An acoustic resonator includes a membrane layer disposed on an insulating layer; a cavity formed by the insulating layer and the membrane layer and having a hydrophobic layer disposed on at least one of a portion of an upper surface of the cavity and a portion of a lower surface of the cavity; and a resonating portion disposed on the cavity and having a second electrode on a piezoelectric layer on a first electrode.

Abstract: The present disclosure relates to a conversion circuit, an inverter, and a method of driving the inverter, wherein a switch is provided at an input terminal of a direct current (DC) link capacitor, so that power is charged in the DC link capacitor through a switching element at initial driving and charged in the DC link capacitor through a rectifier when a voltage level of the DC link capacitor is equal to or higher than a preset reference level, thereby limiting inrush current caused in the DC link capacitor through the switching element when the inrush current is caused.

Abstract: A method for controlling a fault of a three phase four wire interlinking converter system according to one embodiment of the present disclosure comprises obtaining a first d-q-o coordinate plane based on an internal phase angle of output voltage produced from each phase of an inverter; converting the first d-q-o coordinate plane to a second d-q-o coordinate plane based on the o-axis configured differently from the first d-q-o coordinate plane; obtaining an output voltage vector for determining a fault location by performing d-q transform on the second d-q-o coordinate plane; determining occurrence of a fault and an area related to the fault based on the output voltage vector; and in the occurrence of the fault, allocating a zero voltage vector to the area related to the fault.