Abstract: A heterojunction semiconductor is provided where the carrier transport dimension is governed by a layer thickness and where the characteristics of the materials self-limit process steps. A field effect transistor is provided wherein the work function is matched across regions to reduce limits on the channel dimension. A vertical transistor is provided wherein a vertical web is formed with precise thickness governed by electrolytic etching using photogenerated carrier current.
Type:
Grant
Filed:
December 1, 1983
Date of Patent:
November 5, 1985
Assignee:
International Business Machines Corporation
Inventors:
Barbara A. Chappell, Terry I. Chappell, Jerry M. Woodall