Abstract: An incremental position encoder comprising a first member arranged for movement with a second member the movement of which is to be monitored, a plurality of light transmissive or reflective elements of three distinct colors, said elements being arranged in a row on said first member, and the elements being arranged in the row in a repeating sequence of said three colors, a light source directing light to said elements and a color sensitive light detector for receiving light transmitted by, or reflected from said elements, said color sensitive detector being arranged to produce, at any given instant, one of three distinct outputs dependant upon the color of the three available, of the element which is at that instant transmitting or reflecting light from the source to the detector.

Abstract: A method of reducing the DC component in a digital information signal comprised of a plurality of 8-bit data words by converting each of the 8-bit data words to a 10-bit data word, comprises the steps of: selecting the 10-bit data words having a sequence of no more than two bits both at the logic level "1" or "0" from both boundaries of the 10-bit data words; classifying the selected 10-bit data words into a first group consisting of 10-bit data words having five logic level "1" bits, a second group consisting of 10-bit data words having six logic level "1" bits, and a third group consisting of 10-bit data words having four logic level "1" bits, with the third group being formed by inverting the 10-bit data words in the second group; and further assigning the 8-bit words alternately to the 10-bit words in the second and third groups when such 8-bit words correspond to previously assigned 10-bit words having six logic level "1" bits and assigning the remaining 8-bit words to the 10-bit words in the first group

Abstract: An integrated-circuit analog-to-digital converter of the successive-approximation type formed on a single monolithic chip. The converter is made by a diffusion process wherein certain portions of the chip are formed with normal-mode linear transistors, and other portions are formed with inverted mode I.sup.2 L transistors. The normal-mode transistors provide a switchable current-source DAC, a set of three-state output buffers, and a comparator. The inverted mode transistors provide an internal clock and successive-approximation control circuitry for the DAC. The chip also includes a voltage reference to provide for absolute analog-to-digital conversions.