Patents Examined by Igwe Uma Anya
  • Optimized Co/Ti-salicide scheme for shallow junction deep sub-micron device fabrication
    Patent number: 6271133
    Abstract: A new method is established to form different silicide layers over the top of the gate electrode and the surface of the source/drain regions. A thin layer of TiSi2 is formed over the source/drain regions by depositing a layer of titanium and annealing this layer with the silicon substrate. The gate electrode is created as a recessed electrode, in the top recession of the electrode a layer of CoSi2 is formed by depositing a layer of cobalt over the gate electrode. This layer of COSi2 serves as the electrical gate contact point.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: August 7, 2001
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Chong Wee Lim, Eng Hua Lim, Kin Leong Pey, Soh Yun Siah, Chun Hui Low
  • Method of increasing contact area of a contact window
    Patent number: 6136698
    Abstract: A method is provided to increase the contact area of a contact window. In this method, the contact area is mainly increased by a concavity which is formed by first forming a thin oxide layer in the contact region using local oxidation, then further by removing the thin oxide layer. Additionally, in order to reduce the contact resistance, a metal oxide layer can be selectively formed at the contact interface.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: October 24, 2000
    Assignee: United Integrated Circuits Corp
    Inventor: Jau-Hone Lu