Patents Examined by Indranil Chowdhury
  • Patent number: 11604713
    Abstract: A test apparatus is provided for use with a mainframe and an adapter. The test apparatus includes a logical adapter interface unit and a control system. The logical adapter interface unit is interposable between the adapter and the mainframe whereby an I/O signal transmittable from the adapter and to the mainframe is transmitted through the logical adapter interface unit. The logical adapter interface unit is configured to manipulate the I/O signal. The control system is coupled to the logical adapter interface unit and the mainframe and is configured to control manipulations of the I/O signal by the logical adapter interface unit to mimic a condition of I/O traffic being run through the adapter and to log a response of the mainframe to the manipulations.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: March 14, 2023
    Assignee: International Business Machines Corporation
    Inventors: Andrew C. M. Hicks, Michael Peter Lyons, Miles C. Pedrone, Tynan J. Garrett
  • Patent number: 11599437
    Abstract: A mechanism is provided for automatically detecting, diagnosing, transporting, and repairing devices having failed during burn-in testing. Embodiments provide a system that monitors devices undergoing burn-in testing and detecting when a device or a component within a device fails the burn-in test. Embodiments can then alert burn-in-rack monitor personnel of the device failure. Embodiments can concurrently determine the nature of the failure applying a machine learning-based prediction model against log files associated with the failed device. The diagnosis along with a recommended repair strategy can be provided to the repair center as an aid in accelerating the repair process. In addition, the diagnosis can be used to order parts for the repair from a parts depot. In this manner, embodiments can reduce the time for detection, diagnosis, and repair of the failed device.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: March 7, 2023
    Assignee: Dell Products L.P.
    Inventors: Yun Xi, Yu Huang Lin, Meng Meng Jiang, Wen Sen Que, Hua Shan Liang, Mu Shou Lan, Zhi Jian Weng, Lang Lin
  • Patent number: 11593236
    Abstract: Systems and processes are disclosed to preserve data integrity during a storage controller failure. In some examples, a storage controller of an active-active controller configuration can back-up data and corresponding cache elements to allow a surviving controller to construct a correct state of a failed controller's write cache. To accomplish this, the systems and processes can implement a relative time stamp for the cache elements that allow the backed-up data to be merged on a block-by-block basis.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: February 28, 2023
    Assignee: Seagate Technology LLC
    Inventors: Adithya Uligere Narasimhamurthy, Ritvik Viswanatha, Michael Barrell
  • Patent number: 11593229
    Abstract: Data protection methods and systems for a storage environment are provided. A first-in-first out (FIFO) structure stores a logical representation of a first storage location that retains previous data for a data container, after new data for the data container is stored at a second storage location. The FIFO structure also stores a logical representation of a file system tree structure that is stored in persistent storage, after a consistent point operation. In response to an event, the file system tree structure is selected, based on the file system tree structure being closest to a transaction. A snapshot is generated using the file system tree structure. Thereafter, the data container is restored from the snapshot or from a copy of the snapshot.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: February 28, 2023
    Assignee: NETAPP, INC.
    Inventors: Vikhyath Rao, Nikul Y. Patel, Ananthan Subramanian, Vijayabhaskar Rao Sirigineni, Vetrivelan Kaliyaperumal
  • Patent number: 11573846
    Abstract: Techniques for predicting failure mode specific reliability characteristics of tangible equipment using parametric probability models are disclosed. In some example embodiments, a computer system receives a model training configuration entered via a user interface, trains a failure curve model for a selected failure mode of a selected equipment model based on the model training configuration at a time indicated by training schedule data, and generates analytical data for the selected failure mode of the selected equipment model using the trained failure curve model. The failure mode corresponds to a specific way in which the equipment model is capable of failing. In some example embodiments, the training of the failure curve model comprises determining a shape parameter and a scale parameter for the failure curve model based on a fitting of failure event data to a continuous probability distribution, and storing the parameters for use in generating the analytical data.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: February 7, 2023
    Assignee: SAP SE
    Inventor: Rashmi B. Shetty
  • Patent number: 11573871
    Abstract: A debugging method for a Universal Serial Bus (USB) device includes: receiving input information of a terminal through a Human Interface Device (HID) device; when report ID of the input information is a serial port ID, transmitting the input information to a buffer of a virtual serial port Teletype (TTY) device; and extracting the input information of the terminal from the buffer of the virtual serial port TTY device, executing a shell command on the input information, and returning execution result to the terminal through an original path. The method uses a USB interface to implement a HID device, thereby realizing drive-free execution. In addition, use of the endpoint of the HID device can save endpoints needed for additional debugging and driving.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: February 7, 2023
    Inventors: Hu Jiang, Yun Liao, Huirong Zhang, Zhizhong Ouyang
  • Patent number: 11573872
    Abstract: In various examples, one or more components or regions of a processing unit—such as a processing core, and/or component thereof—may be tested for faults during deployment in the field. To perform testing while in deployment, the state of a component subject to test may be retrieved and/or stored during the test to maintain state integrity, the component may be clamped to communicatively isolate the component from other components of the processing unit, a test vector may be applied to the component, and the output of the component may be compared against an expected output to determine if any faults are present. The state of the component may be restored after testing, and the clamp removed, thereby returning the component to its operating state without a perceivable detriment to operation of the processing unit in deployment.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: February 7, 2023
    Assignee: NVIDIA Corporation
    Inventors: Jonah Alben, Sachin Idgunji, Jue Wu, Shantanu Sarangi
  • Patent number: 11544165
    Abstract: To locate an intermittent fault in a communication structure of an aircraft comprising pieces of equipment that are interconnected by cabling forming a plurality of communication media that are shared, an analyzer retrieves an error report relating to transmission errors observed on each of said communication media, performs a count of the transmission errors, per type of error and per communication chain, computes a median of the counts for communication chains comprising the same pair of wired pieces of equipment, and when, for a communication chain, the count exceeds a threshold equal to the median plus a predefined margin, generates an alarm indicating detection of an intermittent fault in association with the communication chain that led the threshold to be exceeded. Thus, intermittent faults are easily located and repaired.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: January 3, 2023
    Inventors: Philippe Passemard, Alvaro Ruiz Gallardo
  • Patent number: 11537478
    Abstract: In the face of ransomware attacks, which can be increasingly difficult to effectively prevent, a solution can be considered to be the minimization of the cost and time taken to recover data and, hence business activities. Embodiments perform a restore operation that include automatically identifying the most recent healthy backup, from which data should be restored, and the prioritizing of the order in which data should be restored.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: December 27, 2022
    Inventors: Niamh O'Mahony, Andrew Byrne, Regis Wenner, Celine Brandy
  • Patent number: 11513927
    Abstract: Techniques described herein relate to a method for performing testing operations for information handling systems.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: November 29, 2022
    Assignee: Dell Products L.P.
    Inventors: Ramakanth Kanagovi, Guhesh Swaminathan, Saheli Saha, Jason Fay, Araiz Baqi, Sankunny Jayaprasad
  • Patent number: 11500747
    Abstract: A computing system initialization system includes a computing device that is coupled to a management device and that includes a processing system having at least one register storing debug-message-display-determination instructions, and a memory system that is coupled to the processing system and that includes Basic Input/Output System (BIOS) instructions that, when executed by the processing system, cause the processing system to provide a BIOS engine. The BIOS engine begins initialization operations and, during those initialization operations, generates at least one first debug message. The BIOS engine then accesses the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determines that the at least one first debug message should be displayed. In response, the BIOS engine transmits the at least one first debug message to the management device such that the management device displays the at least one first debug message.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: November 15, 2022
    Assignee: Dell Products L.P.
    Inventors: Jing-Hui Lee, Shih-Chieh Hsu
  • Patent number: 11487621
    Abstract: An information handling system may include at least one processor, a memory, and an embedded controller (EC). The information handling system may be configured to, prior to initialization of an operating system of the information handling system: execute memory reference code configured to test selected regions of the memory; transmit results of the memory reference code to the EC; store, at the EC, information indicative of respective likelihoods that particular regions of the memory are bad; and upon a subsequent boot, select a region of the memory having a low likelihood of being bad for loading a Basic Input/Output System (BIOS) of the information handling system.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: November 1, 2022
    Assignee: Dell Products L.P.
    Inventors: Adolfo Montero, Michael Arms, Balasingh P. Samuel
  • Patent number: 11474875
    Abstract: A system for dynamically load-balancing at least one redistribution element across a group of computing resources that facilitates at least an aspect of an Industrial Execution Process in an M:N working configuration is illustrated.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: October 18, 2022
    Assignee: Schneider Electric Systems USA, Inc.
    Inventors: Raja Ramana Macha, Andrew Lee David Kling, Frans Middeldorp, Nestor Jesus Camino, Jr., James Gerard Luth, James P. McIntyre
  • Patent number: 11474914
    Abstract: A circuit device 100 includes an interface circuit 160 that receives image data and information for image check and a processing circuit 105 that performs image check processing. The information for image check includes information for designating an image check method for a region to be subjected to image check and position information of the region to be subjected to image check. The processing circuit 105 performs the image check processing on the image data of the region to be subjected to image check specified by the position information, using the image check method designated by the designation information.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: October 18, 2022
    Inventor: Hideki Ogawa
  • Patent number: 11474915
    Abstract: Example implementations relate to management of clusters. A cluster recovery manager may comprise a processing resource; and a memory resource storing machine-readable instructions to cause the processing resource to: adjust, based on a monitored degree of performance of a controller of a controller cluster, a state of the controller to one of a first state and a second state; and reassign a corresponding portion of a plurality of APs managed by the controller periodically to a different controller until the state of the controller is determined to be adjustable to the first state. The reassignment can be triggered responsive to a state adjustment of the controller from the first state to the second state.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: October 18, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Srinivas Rao Killadi, Sree Vasthav Shatdarshanam Venkata, Indu Shree Akasapu
  • Patent number: 11461203
    Abstract: Disclosed is a systems and methods of distributed data storage using multi-layers consistent hashing comprising: a plurality of storage nodes providing data storage and redundancy protection; a plurality of management nodes maintaining the properties of the storage nodes and mapping information from virtual groups to storage nodes; a plurality of monitor nodes maintaining the state of storage nodes and handling the changes of states of storage nodes including joining, decommissioning and failure; and one or more clients providing entries for applications or users to access the storage system. The storage nodes is in a hierarchical tree arrangement, and each storage node in each layer of the tree is allocated with a plurality of identities and configured for remaining hash space with consistency. Instead of sharing one hash space among all storage nodes, there are a plurality of hash spaces kept consistent in each layer of the storage hierarchical tree.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: October 4, 2022
    Inventors: Bin Hao, Jian Zhu, Jingyao Zhang
  • Patent number: 11455203
    Abstract: A system analysis support device includes a data acquisition part that obtains time series data (items) measured in a system that is to be analyzed, an overall abnormality degree calculation part that calculates transition of abnormality degree representing overall abnormality degree of the system that is to be analyzed, using a predictive model generated so that, with 2 or more time series data (items) as input, values representing a relationship between the 2 or more time series data (items) are outputted, and the time series data (items), and a representative index selection part that selects and presents time series data (items) indicating change similar to transition of the overall abnormality degree of the system that is to be analyzed, from among the time series data (items).
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: September 27, 2022
    Inventor: Katsuhiro Ochiai
  • Patent number: 11449404
    Abstract: A processor unit includes a memory and an ALU coupled with the memory. The processor unit also comprises a test controller, a test control register, and a signature register. The test controller manages a series of steps to test the processor unit. It overrides an ALU control signal with a replacement ALU control signal, stored in the test control register. It generates a test pattern and writes it to a memory address. It reads memory output data from the memory address, and forwards it to the ALU. The ALU executes an operation on the memory output data based on the replacement ALU control signal. The ALU output provides a test result, which is compressed to obtain a test signature, and stored in the signature register.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: September 20, 2022
    Assignee: SambaNova Systems, Inc.
    Inventors: Thomas Alan Ziaja, Dinesh Rajasavari Amirtharaj
  • Patent number: 11449403
    Abstract: A method and system for detecting faults in a communication interface is disclosed. The communication interface is connected to a field device and a device bus comprising generating periodic diagnostic pulse by a programing unit. The programming unit is communicatively connected to the controller and a controller interface and provides the diagnostic pulse to a multiplexer to periodically apply the diagnostic pulses from the programming unit to a first winding of a transformer. The programming unit provides the diagnostic pulse to the isolation unit. A sensing unit senses a voltage drop across a sense resistor, the sensing unit having an input connected to the sense resistor and an output connected to the programming unit. The sensing unit communicates a sense signal based on the comparison to the programming unit, and switches from a primary or a secondary module to the other based on the sense signal.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: September 20, 2022
    Assignee: Honeywell International Inc.
    Inventors: Amit Kulkarni, Ganesh Ratilal Patil, Mohammed Rizwan, Vimal Kant
  • Patent number: 11429490
    Abstract: An information handling system may include a processor, a basic input/output system (BIOS) comprising a program of instructions executable by the processor and configured to cause the processor to initialize components of the information handling system; and a management controller communicatively coupled to the processor and configured to, during a pre-Extensible Firmware Interface Initialization (PEI) phase of the BIOS, operate as a network proxy for the BIOS to allow the BIOS to communicate data via an out-of-band network interface of the management controller.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: August 30, 2022
    Assignee: Dell Products L.P.
    Inventors: Ibrahim Sayyed, Sumanth Vidyadhara, Adolfo S. Montero