Patents Examined by Isabel Rodriguez
  • Patent number: 6922324
    Abstract: Substrates such as silicon wafers, flat panel displays, and hard disk drive head substrates are electrostatically gripped using power derived from a physically separated source. Noncontacting coupling permits operation in vacuum as a result of its efficient energy conversion. Bidirectional communications between a controller and the remote gripper electronics along its power coupling lines is enabled. Inclusion of a communications link allows monitoring of system status and full control over the substrate sensing, grip, and release processes. The system of the present invention provides freedom from rf bias filtering considerations, and enables installation of grippers on robot arms without stretching, bending, or sliding electrical connections.
    Type: Grant
    Filed: July 10, 2000
    Date of Patent: July 26, 2005
    Inventor: Christopher M. Horwitz
  • Patent number: 6771481
    Abstract: A plasma processing apparatus comprises: a body that comprises a vacuum processing chamber with a wafer stage on which a semiconductor wafer is held, a plasma producing unit for producing plasma within the vacuum chamber, and a high frequency source for applying a high frequency bias voltage to the wafer stage. A control unit controls various parameters of the body of the plasma processing apparatus. The control unit comprises a detecting unit for detecting the high frequency voltage or high frequency current applied to the wafer stage and for calculating a difference in phase between the high frequency voltage and the high frequency current, and a unit for obtaining a characteristic of the plasma or an electric characteristic of the plasma processing apparatus based on the detected high frequency voltage, the detected high frequency current, and the obtained difference in phase.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: August 3, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Ryoji Nishio, Seiichiro Kanno, Hideyuki Yamamoto, Akira Kagoshima
  • Patent number: 6751078
    Abstract: A power use circuit breaker includes an arc generating switching unit which adds an electrical resistance in a circuit during current interruption to attenuate a current to be interrupted, a vacuum bulb which is electrically connected in series with the arc generating switching unit and interrupts the attenuated current and a current conducting switching unit connected in parallel with the series circuit of the vacuum bulb and the arc generating switching unit. For current conduction the current conducting switching unit is closed after the vacuum bulb and the arc generating switching unit are closed, and for current interruption after opening the current conducting switching unit, the vacuum bulb and the arc generating switching unit are opened.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: June 15, 2004
    Assignees: Hitachi, Ltd., Hitachi Electric Systems Co., Ltd.
    Inventors: Noriaki Munakata, Yukio Kurosawa, Haruo Honda, Shigetoshi Oouchi, Masaki Shinohara
  • Patent number: 6731485
    Abstract: A digital electric power inverter comprising: a CPU, a PWM driving circuit, a PWM converting circuit, a rectifying circuit, an AC driving circuit, a DC/AC inverting circuit, an overload detecting circuit and an alarm circuit, the power inverter is characterized by that: the entire circuitry of the electric power inverter is designed to be controlled by the CPU that can accurately control these circuits to get an ability of high driving outputting.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: May 4, 2004
    Assignee: Long Well Electronics Corp.
    Inventor: Hong-Shung Liu
  • Patent number: 6721161
    Abstract: An electrostatic circuit for a sole having an outsole, an insole and a midsole positioned between the insole and outsole. In one embodiment, the electrostatic circuit includes at least one conductor path that is printed on a first side of a first substrate. The conductor path may have a first exposed end attachable to the outsole and a second exposed end attachable to the insole. The electrostatic circuit may also include at least one resistor electrically that is coupled to each conductor path and mounted to the first substrate. In another embodiment, the electrostatic circuit may include first and second conductive pads attached to the first and second ends of each conductor path.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: April 13, 2004
    Assignee: Iron Age Corporation
    Inventors: Chien Lee, Donald R. Jensen
  • Patent number: 6721157
    Abstract: An electrostatic discharge device (ESD device) of the surface mount type and a method of fabricating such devices are disclosed. The ESD device includes an upper cover plate made of an insulating material, a middle insulating plate made of an insulating material and laminated on the lower surface of the upper cover plate, and having a discharge opening, with first and second discharge terminals formed in the middle insulating plate at opposite edges of the discharge opening, and a lower cover plate made of an insulating material and laminated on the lower surface of the middle insulating plate, and hermetically sealing the discharge opening of the middle insulating plate in cooperation with the upper cover plate, and having a second signal electrode brought into electric contact with the first discharge terminal, and a second ground electrode brought into electric contact with the second discharge terminal.
    Type: Grant
    Filed: June 27, 2001
    Date of Patent: April 13, 2004
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Yu-Seon Shin
  • Patent number: 6717783
    Abstract: The present invention provides a short circuit power limiter circuit having a current sensor and a power limiter. The short circuit sensor sends a short circuit flag signal to the power limiter when the short circuit sensor detects a short circuit condition in a target circuit. The power limiter then reduces the power consumption of the target circuit. In a specific example, the power limiter toggles a particular portion of the target circuit on and off to reduce the circuit's average short circuit power consumption. This cycle is repeated as long as a short circuit condition exists.
    Type: Grant
    Filed: January 9, 2001
    Date of Patent: April 6, 2004
    Assignee: Exar Corporation
    Inventors: Robert Alan Brannen, Bahram Fotouhi
  • Patent number: 6717781
    Abstract: A superconducting magnet electrical circuit is provided for quench protection. A superconducting coil assemblage is provided including a plurality of spatially separated main and secondary magnet coil portions. The main magnet coil portions are connected in series to form at least one main coil series circuit. The secondary magnet coil portions are also connected in a series to form at least one secondary coil series circuit. At least one temperature limiting circuit is also provided. The temperature limiting circuit may be a quench heater circuit or a quench resistor circuit. The temperature limiting circuit has a plurality of quench heaters or a plurality of quench resistors connected with the superconducting coil assemblage. A superconductive switch is coupled with the superconducting coil assemblage.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: April 6, 2004
    Assignee: GE Medical Systems Global Technology Company, LLC
    Inventors: Minfeng Xu, Xianrui Huang, Bu-Xin Xu, Jinhua Huang
  • Patent number: 6707655
    Abstract: A recloser is adaptively controlled so that it will operate in a manner responsive to prevailing conditions such as time of day, day of week, and/or load current. A protection setting group is stored in a memory accessible by the recloser controller, and contains a set of instructions for controlling the recloser based on the prevailing conditions. The prevailing conditions are continuously monitored, and the control of the recloser is based on the prevailing conditions and the protection setting group.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: March 16, 2004
    Assignee: ABB Technology AG
    Inventors: Jeffrey L. McElray, Sr., Carl J. LaPlace, David G. Hart, William M. Egolf, Graeme N. McClure
  • Patent number: 6693782
    Abstract: A limiting circuit for controlling overshoot in a charge current in a battery recharging system includes a current amplifier receiving input indicative of charge current in a rechargeable battery circuit and generating a current error signal, a voltage amplifier receiving input indicative of charge voltage in the rechargeable battery circuit and generating a voltage error signal, and a power amplifier receiving a first signal indicative of power in a switching voltage regulator and a second power signal indicative of power in the rechargeable battery circuit, and generating a power error signal. The limiting circuit compares the voltage error signal, the current error signal, and the power error signal to determine the error signal having the greatest value, and generates an input signal to a pulse width modulation comparator.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: February 17, 2004
    Assignee: Dell Products L.P.
    Inventor: Steven J. Lash
  • Patent number: 6687113
    Abstract: An electrostatic chuck comprising a ceramic chuck body having an adsorption face and an electrode for applying a potential to the adsorption face, the chuck body including a ceramic consisting mainly of MgO. The ceramic that consists mainly of MgO is doped with one or more additives selected from a group including TiC, TiO2, ZrO2, V2O5, Nb2O5, Ta2O5, Co3O4, Cr2O3, and NiO so that its electrical resistivity in a working temperature region ranges from 1×108 to 1×1012 &OHgr;·cm. This electrostatic chuck is highly resistant to a corrosive environment such as fluoride plasma.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: February 3, 2004
    Assignee: NHK Spring Co., Ltd.
    Inventors: Shinji Saito, Toshihiko Hanamachi, Takashi Kayamoto
  • Patent number: 6687101
    Abstract: A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: February 3, 2004
    Assignee: Power Integrations, Inc.
    Inventors: Balu Balakrishnan, Alex Djenguerian, Leif Lund
  • Patent number: 6683764
    Abstract: The invention discloses an arc extinguishing aid with an externally powered magnetic blowout coil 3 for switching low currents in which the current direction in the externally powered magnetic blowout coil 3 is switched based on the detection of the current direction in the primary circuit of a DC power switch.
    Type: Grant
    Filed: February 8, 2001
    Date of Patent: January 27, 2004
    Assignee: General Electric Company
    Inventor: Thomas Pniok
  • Patent number: 6680837
    Abstract: A hiccup-mode short circuit protection circuit and method for a linear voltage regulator using a FET pass transistor uses the capacitance of the pass transistor's gate as a timing element. The regulator's output voltage is monitored, and when it droops below a voltage indicative of a short-circuit condition, the regulator's drive signal is disconnected from the pass transistor. While the short-circuit condition persists, a first current is provided to charge the pass transistor's gate capacitance. When the gate voltage rises above a first predetermined threshold, a second current is provided to further charge the gate capacitance. When the gate voltage rises above a second predetermined threshold, the gate capacitance is discharged. The gate capacitance is cyclically charged and discharged in this way unless the output voltage rises to indicate that the short-circuit condition has cleared, in which case the regulator's drive signal is restored to the pass transistor's gate.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: January 20, 2004
    Assignee: Analog Devices, Inc.
    Inventor: Joseph C. Buxton
  • Patent number: 6678140
    Abstract: Improved modular transient voltage surge suppressor apparatus that provide a simple structure for coupling multiple modules are disclosed. In general, such apparatus includes a substrate; a mounting post coupled to and extending substantially perpendicular to the substrate; and a transient voltage surge suppression module, wherein the module includes a non-conductive housing having a surge suppression circuit contained therein, and mounting means coupled to the non-conductive housing, the mounting means comprising a bore therethrough for slidably mounting the transient voltage surge suppression module on the mounting post, the bore having an internal profile corresponding to an external profile of the mounting post.
    Type: Grant
    Filed: March 12, 2001
    Date of Patent: January 13, 2004
    Assignee: Current Technology, Inc.
    Inventors: Asif Y. Jakwani, Getzel Gonzalez Garcia, Fyodor M. Shterenberg, Simon Hoi-Keung Yu
  • Patent number: 6678130
    Abstract: An electronic circuit consists of a voltage regulator and an electrostatic discharge (ESD) shunt. The voltage regulator maintains a prescribed voltage for the voltage supply of the chip. The ESD shunt protects the chip circuitry from undesirable levels of current or voltage. The voltage regulator and the ESD shunt share the functionality of a single, very large transistor. This combination results in a circuit with a smaller area, much smaller than if the two circuits had been built separately. With the reduction in area, both circuits can be manufactured on a single chip.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: January 13, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Steven J. Ratner, Hyoung Jo Youn, Leandro A. Chua, Jr.
  • Patent number: 6674625
    Abstract: A lightning protection system including a monitoring system (10) for detecting dangerous atmospheric conditions within specific geographic zones, a transmission system (12) for sending control codes, and multiple circuit connection/disconnection devices (16) for electrically connecting to electronic equipment to be protected. The lightning protection system (10) protects electrical and electronic equipment (18) by detecting and locating dangerous atmospheric conditions in a particular geographic area and transmitting broadcast control commands to electrical circuit connection/disconnection devices (16) in the geographic area, which have a receiver for receiving the broadcast control commands and an interruption mechanism (16) for disconnecting and reconnecting the electrical equipment from external conductors in response to the control commands. The monitoring system (10) may consist of multiple detectors located in different geographic areas.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: January 6, 2004
    Assignee: Storm Shelter Corporation
    Inventor: J. Dennis Page
  • Patent number: 6674627
    Abstract: A needle-card adjusting device for planarizing needle sets on a needle card, in which the needle card is connected to a circuit board used as a contact interface to a test head. The needle-card adjusting device has a separate, dynamically operating adjusting unit for adjusting the needle-card.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: January 6, 2004
    Assignee: Infineon Technologies AG
    Inventor: Michael Kund
  • Patent number: 6671153
    Abstract: A diode string with very low leakage current is used in power supply ESD clamp circuits. By adding an CMOS-Controlled Lateral SCR device into the cascaded diode string, the leakage current of this new diode string with 6 cascaded diodes under 5 Volts (3.3 Volts) forward bias can be controlled below 2.1 (1.07) nA at a temperature of 125° C. in a 0.35 &mgr;m silicide CMOS process. The holding voltage of this design with the CMOS-Controlled Lateral SCR can be linearly adjusted by changing the number of the cascaded diodes in the diode string for the application among the power lines with different voltage levels. The ESD level of this ESD clamp circuit is greater than 8,000 Volts in the Human-Body-Model ESD test. The diodes string is suitable for portable or low-power CMOS Integrated Circuit (IC) devices.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: December 30, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ming-Dou Ker, Wen-Yu Lo, Hun-Hsien Chang
  • Patent number: 6665159
    Abstract: Into an internal circuit to operate in a high-frequency band, there is incorporated a protective circuit of a multistage connection which is constructed to include a plurality of diode-connected transistors having a low parasitic capacity and free from a malfunction even when an input signal higher than the power supply voltage is applied. Into an internal circuit to operate in a low-frequency band, there is incorporated a protective circuit which is constructed to include one diode-connected transistor. The protective circuits include two lines of protective circuit, in which the directions of electric currents are so reversed as to protect the internal circuits against positive/negative static electricities.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: December 16, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kumiko Takikawa, Satoshi Tanaka, Masumi Kasahara