Patents Examined by Ishwar I. B. Patel
-
Patent number: 8008581Abstract: A circuit board includes a board, a first conductive pad provided on the board, a second conductive pad provided with a first distance from the first conductive pad. A mask extends over the board and has an opening that extends over at least a part of the first conductive pad, at least a part of the second conductive pad, and at least a part of an intervening region of the board between the first and second conductive pads. A conductive material is provided in the opening, and extends over the at least a part of the first conductive pad, the at least a part of the intervening region, and the at least a part of the second conductive pad.Type: GrantFiled: August 24, 2006Date of Patent: August 30, 2011Assignee: Kyocera CorporationInventors: Tomohiko Nawata, Makiko Nawata, legal representative
-
Patent number: 7838779Abstract: A wiring board in which lower-layer wiring composed of a wiring body and an etching barrier layer is formed in a concave portion formed on one face of a board-insulating film, upper-layer wiring is formed on the other face of the board-insulating film, and the upper-layer wiring and the wiring body of the lower-layer wiring are connected to each other through a via hole formed in the board-insulating film. The via hole is barrel-shaped, bell-shaped, or bellows-shaped.Type: GrantFiled: June 15, 2006Date of Patent: November 23, 2010Assignees: NEC Corporation, NEC Electronics CorporationInventors: Shintaro Yamamichi, Katsumi Kikuchi, Hideya Murai, Takuo Funaya, Takehiko Maeda, Kenta Ogawa, Jun Tsukano, Hirokazu Honda
-
Patent number: 7659481Abstract: A printed wiring board mounted with a BGA package including pads, through holes and leads. The leads are linearly formed with almost the same width as the diameter of each of the pads and through holes and thus have high bonding strength against their peeling against an external force. The pads are provided at an angle of approximately 45 degrees outwardly relative to the through holes and along almost in the direction of application of thermal stress, and thus have high durability against their peeling due to an external force.Type: GrantFiled: October 4, 2005Date of Patent: February 9, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Shigenori Miyagawa
-
Patent number: 7655870Abstract: An exemplary printed circuit board includes a power plane, and a ground plane. The power plane includes two power modules, and an insulating medium for insulating the two power modules from each other. The ground plane is insulated from the power plane, a plurality of slots is defined in the ground plane and located close to facing edges of the two power modules, and the slots are arranged in rows along the facing edges of the two power modules.Type: GrantFiled: July 30, 2007Date of Patent: February 2, 2010Assignee: Hon Hai Precision Industry Co., Ltd.Inventors: Liang-Yao Chang, Shou-Kuo Hsu
-
Patent number: 7652213Abstract: A multilayer substrate includes an internal conductor connection structure having first and second via conductors adjacent to each other in the multilayer substrate and a first line conductor disposed in the multilayer substrate. The first via conductor includes a first continuous via conductor arranged to extend in a direction away from the second via conductor, and the first via conductor is connected to the first line conductor through the first continuous via conductor.Type: GrantFiled: February 8, 2005Date of Patent: January 26, 2010Assignee: Murata Manufacturing Co., Ltd.Inventors: Issey Yamamoto, Naoki Kaise, Yutaka Morikita
-
Patent number: 7649143Abstract: A wired-circuit-board assembly sheet is provided having removable portions that are easily removable without any generation of metal powder. The wired-circuit-board assembly sheet comprises a plurality of suspension boards with circuits, distinguishing marks for distinguishing defectiveness of the suspension boards with circuits, and a supporting sheet for supporting the suspension boards with circuits and the distinguishing marks, wherein openings are formed in the supporting sheet, and removable portions which are to be removed when the suspension boards with circuits are judged defective are located in the openings and also supported by the supporting sheet via joint portions formed of resin.Type: GrantFiled: January 18, 2007Date of Patent: January 19, 2010Assignee: Nitto Denko CorporationInventors: Tetsuya Ohsawa, Kouji Kataoka, Yoshihiko Takeuchi
-
Patent number: 7645943Abstract: A configurable printed circuit board can be used with a bussed electrical center in a vehicle and has a dielectric body. The dielectric body defines an array of plated through-holes that are constructed to receive a terminal of an electrical adaptor. A conductive trace is also adhered to a surface of the dielectric body and is routed through some of the plated through-holes for carrying current between them. An aperture is defined through a portion of some of the plated through-holes and the respective conductive traces to electrically isolate one side of the conductive trace from another side; and thus the printed circuit board can accommodate more than one electrical device in a single section.Type: GrantFiled: July 11, 2007Date of Patent: January 12, 2010Assignee: Delphi Technologies, Inc.Inventor: Jason R. Horiuchi
-
Patent number: 7642468Abstract: To improve reliability of interlayer connection of a multilayer wiring board. Plural metal conductor pattern layers are formed on a base material made of thermoplastic resin. Then, high melting metal containing copper, low melting metal containing tin, and binder resin are packed into a via hole. Subsequently, predetermined heat and pressure are applied. Then, while half-melted metal mixture droplets of the low and high melting metals and melted binder resin are phase separated from each other, the surfaces of the conductor patterns that face the openings of the via and the low melting metal are alloyed with each other to form an alloy layer as well as the high and low meting metals are alloyed with each other to form a columnar-shaped interlayer connection part. As a result, an intermediate layer is formed between the outer surface of the columnar-shaped interlayer connection part and inner surface of the via hole.Type: GrantFiled: July 18, 2006Date of Patent: January 5, 2010Assignee: Sony CorporationInventors: Masakazu Nakada, Minoru Ogawa
-
Patent number: 7633014Abstract: A superconductor cable includes a superconductive cable core (1) and a cryostat (2) enclosing the same. The cable core (1) has a superconductive conductor (3), an insulation (4) surrounding the same and a shielding (5) surrounding the insulation (4). A layer (3b) of a dielectric or semiconducting material is applied to a central element (3a) formed from a normally conducting material as a strand or tube and a layer (3c) of at least one wire or strip of superconductive material is placed helically on top. The central element (3a) and the layer (3c) are connected to each other in an electrically conducting manner at the ends of the cable core (1).Type: GrantFiled: March 17, 2006Date of Patent: December 15, 2009Assignee: NexansInventors: Arnaud Allais, Frank Schmidt
-
Patent number: 7629540Abstract: A wired circuit board that can provide improved reliability on connection between the terminal portions and the external terminals while ensuring high productivity and cost reduction, and a production method thereof. After a conductive pattern 3 including terminal portions 6 to connect with external terminals 22 of an electronic component 21 and criterion marks 8 to determine presence or absence of an inhibitory portion 23 that may be formed due to formation of an insulating cover layer 4 to inhibit connection between the terminal portions 6 and the external terminals 22 are formed on the insulating base layer 2 simultaneously, the insulating cover layer 4 to cover the conductive pattern 3 and an opening 7 from which the terminal portions 6 and the criterion marks 8 are exposed is formed. Thereafter, the presence or absence of the inhibitory portion 23 is determined with reference to the criterion marks 8 exposed from the opening 7 of the insulating cover layer 4.Type: GrantFiled: February 7, 2008Date of Patent: December 8, 2009Assignee: Nitto Denko CorporationInventors: Yuichi Takayoshi, Kazushi Ichikawa, Toshiki Naito
-
Patent number: 7629539Abstract: A wired circuit board has a metal supporting board, an insulating layer formed on the metal supporting board, a conductive pattern formed on the insulating layer and having a plurality of wires arranged in mutually spaced-apart relation, and a plurality of semiconductive layers formed on the insulating layer and electrically connected to the metal supporting board and the respective wires. The semiconductive layers are provided independently of each other in correspondence to the respective wires.Type: GrantFiled: June 28, 2007Date of Patent: December 8, 2009Assignee: Nitto Denko CorporationInventors: Jun Ishii, Yasunari Ooyabu
-
Patent number: 7626126Abstract: A multilayer semiconductor device has plural semiconductor devices, each having a circuit board for a ball grid array and a semiconductor chip provided on the board. The semiconductor boards are bonded together by a reflow mounting process to use a solder ball for interlayer connection so as to form a multilayer structure. The plural semiconductor devices each have a projection for restricting inclination of the circuit board, and the projection is provided between neighboring two of the circuit boards.Type: GrantFiled: June 7, 2006Date of Patent: December 1, 2009Assignee: Hitachi Cable, Ltd.Inventors: Akiji Shibata, Kimio Inaba, Masayuki Hosono
-
Patent number: 7626124Abstract: A wiring board has a circuit pattern that includes metal foil attached to an insulating layer, and a built-up circuit pattern disposed on top of the metal foil circuit pattern. The built-up circuit pattern is an increased thickness laminate of cold spray processed metal material. Even when a power semiconductor is mounted on the built-up circuit pattern, the heat that is generated by losses therein can be diffused by the built-up circuit pattern. The wiring board has excellent heat dissipation, can be manufactured by a small number of process steps, and is of low cost.Type: GrantFiled: February 22, 2006Date of Patent: December 1, 2009Assignee: Fuji Electric Holdings Co., Ltd.Inventor: Kenji Okamoto
-
Patent number: 7615707Abstract: A printed circuit board and a forming method for forming the printed circuit board are disclosed. The printed circuit board includes a substrate and a conductive layer. The substrate includes a through hole, wherein one side of the through hole of the substrate corresponds to a first diameter, and the other side of the through hole of the substrate corresponds to a second diameter. The second diameter is greater than the first diameter. The conductive layer is placed on the inner surface of the through hole for electrically connecting the two sides of the substrate.Type: GrantFiled: October 20, 2005Date of Patent: November 10, 2009Assignee: Lite-On Technology Corp.Inventor: Yung-Jen Lin
-
Patent number: 7606050Abstract: A flexible circuit is populated on one or both sides and disposed about a substrate to create a circuit module. Along one of its edges, the flex circuit is connected to a connective facility such as a multiple pin connector while the flex circuit is disposed about a thermally-conductive form that provides structure to create a module with plural layers of circuitry in a single module. In preferred embodiments, the form is metallic and, in alternative preferred embodiments, the module circuitry is disposed within a housing. Preferred embodiments may be devised that present a compact flash module within a housing that may be connected to or into a system or product through a connective facility that is preferably a male or female socket connector while the housing is configured to mechanically adapt to an application environment.Type: GrantFiled: July 22, 2005Date of Patent: October 20, 2009Assignee: Entorian Technologies, LPInventors: James W. Cady, James Douglas Wehrly, Jr., Paul Goodwin
-
Patent number: 7589283Abstract: A method of making a circuitized substrate designed to substantially eliminate impedance disruptions during passage of signals through signal lines of the substrate's circuitry. The produced substrate includes a first conductive layer with a plurality of conductors on which an electrical component may be positioned and electrically coupled. The pads are coupled to signal lines (e.g., using thru-holes) further within the substrate and these signal lines are further coupled to a second plurality of conductive pads located even further within the substrate. The signal lines are positioned so as to lie between the substrate's first conductive layer and a voltage plane within a third conductive layer below the second conductive layer including the signal lines. A second voltage plane may be used adjacent the first voltage plane of the third conductive layer.Type: GrantFiled: August 15, 2007Date of Patent: September 15, 2009Assignee: Endicott Interconnect Technologies, Inc.Inventors: Charles E. Danoski, Irving Memis, Steven G. Rosser
-
Patent number: 7586046Abstract: The invention provides a wired circuit board that can prevent deterioration of a conductive pattern and short-circuiting of the conductive pattern. The wired circuit board is presented herein in the form of a suspension board with circuit which comprises an insulating base layer formed on a metal supporting board, a conductive pattern formed on the insulating base layer, a metal oxide layer formed on a surface of the conductive pattern and on a surface of the insulating base layer by sputtering, and an insulating cover layer, formed on the metal oxide layer, to cover the conductive pattern. According to this suspension board with circuit, since the metal oxide layer to cover the conductive pattern is formed by the sputtering, the metal oxide layer can be formed with a uniform thickness.Type: GrantFiled: September 5, 2006Date of Patent: September 8, 2009Assignee: Nitto Denko CorporationInventors: Jun Ishii, Yasuhito Funada, Yasunari Ooyabu
-
Patent number: 7579552Abstract: A TAB tape for a tape carrier package may have an opening formed in a shortest connection portion. The opening may be provided in the shortest connection portion and a portion of the corresponding second lead. The opening may be arranged near a boundary between the corresponding first lead and the shortest connection portion. The opening may be sized to reduce the change of the lead width from the first lead to the second lead.Type: GrantFiled: January 30, 2006Date of Patent: August 25, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Na-Rae Shin, Dong-Han Kim
-
Patent number: 7579554Abstract: A printed circuit board (120) includes an insulating substrate (120a) on which conductive films (120b) are formed. Semiconductor devices (8) disposed external to the printed circuit board (120) have their leads (24a, 24b, 24c) connected to the conductive films. A flexible portion (30) is formed in the insulating substrate (120a) at a location near the location where the leads (24a, 24b, 24c) are connected to the conductive films (120b).Type: GrantFiled: May 22, 2006Date of Patent: August 25, 2009Assignee: Sansha Electric Manufacturing Company LimitedInventors: Kenzo Danjo, Hideo Isii, Masao Katooka, Shuji Yokoyama
-
Patent number: 7576288Abstract: A multilayer flexible wiring board including (1) plural single-sided wiring boards each having a wiring pattern on one side of the corresponding substrate and two-layer conductor posts projecting from the wiring pattern to the side of the substrate opposite from the wiring pattern, wherein the substrates other than that of the outermost layer have the pads to be connected to the two-layer conductor posts on the side opposite from the conductor posts, and the wiring pattern has no surface coating; (2) a flexible wiring board having on at least one side thereof the pads for connection to the conductor posts and including a wiring pattern with surface coating applied on the flexible portion but no surface coating applied on the multilayer portion, and (3) an adhesive layer having a flux function, wherein the conductor posts and pads are connected by a metal or an alloy, and the wiring patterns are electrically connected.Type: GrantFiled: November 19, 2003Date of Patent: August 18, 2009Assignee: Sumitomo Bakelite Company LimitedInventors: Masayoshi Kondo, Masaaki Kato, Toshiaki Chuma, Satoru Nakao, Kentaro Fujiura