Abstract: A 64-ary QAM (Quadrature Amplitude Modulation) demodulation apparatus and method for receiving an input signal Rk(Xk,Yk) comprised of a kth quadrature-phase signal Yk and a kth in-phase signal Xk, and generating soft decision values ?(sk,5), ?(sk,4), ?(sk,3), ?(sk,2), ?(sk,1) and ?(sk,0) for the input signal Rk(Xk, Yk) are disclosed. A first soft decision value generator receives the quadrature-phase signal Yk of the received signal Rk and a distance value 2a between six demodulated symbols on the same axis, and generates soft decision values ?(sk,5), ?(sk,4) and ?(sk,3) for sixth, fifth, and fourth demodulated symbols. A second soft decision value generator receives the in-phase signal Xk of the received signal Rk and the distance value 2a between the six demodulated symbols on the same axis, and generates soft decision values ?(sk,2), ?(sk,1) and ?(sk,0) for third, second and first demodulated symbol.

Abstract: A digital system aligns a set of serial data receiver demultiplex circuits, thereby aligning the bits in the data words, while maintaining separate and optimally aligned data recovery clocks for each channel. The digital system generates a reference clock signal and one or more slave clock signals. Phase circuitry receives the slave clock signal and outputs a plurality of clock phase signals. A phase selection circuit receives the plurality of clock phase signals and selects an adjusted clock signal in response to a phase selection signal. A clock correlation circuit determines a phase difference between the reference clock signal and the adjusted clock signal and provides the phase selection signal to minimize the phase difference. The clock correlation circuit provides the phase selection signal from a counter.