Abstract: Systems and methods reduce unwanted effects caused by mismatch in amplifier circuits having components that are trimmable during and post-production to minimize DC offset. Various embodiments of the invention trim out amplifier mismatch by determining trim codes for two or more phases of operation of an amplifier circuit and use those trim codes to determine a final trim code for use in regular operation.

Abstract: A single pole double throw (SPDT) switch with embedded attenuators includes a transmitter attenuator circuit directly connected to a common input of the SPDT switch, and a receiver attenuator circuit directly connected to the common input of the SPDT switch. Switches in the transmitter attenuator circuit and in the receiver attenuator circuit are selectively or individually set to an open state or to a closed state to directly connect the transmitter attenuator circuit or the receiver attenuator circuit to the common input. The selective setting of the states of the switches also determines a given amount of attenuation for the transmitter attenuator circuit or the receiver attenuator circuit.

Abstract: In an example, a level shifter includes a low side having first and second inputs. The level shifter also includes a high side, where the high side has a latch having first and second terminals. The high side also includes a current comparator including first and second current mirrors. The high side includes isolation circuitry including first and second transistors, in which the first transistor has a first control terminal, the second transistor has a second control terminal, the first transistor is coupled between the first terminal and the first current mirror, the second transistor is coupled between the second terminal and the second current mirror, the first control terminal is coupled to the second current mirror, and the second control terminal is coupled to the first current mirror.

Abstract: Disclosed are a radio frequency switch circuit, a chip, and a communication terminal. In the radio frequency switch circuit, a switch chain is formed by at least one switch unit being provided between a first port and a second port; each switch unit is connected to a first bias circuit and to a second bias circuit; further adjustments are made to the ratio of the parasitic capacitance between MOS transistors of each switch unit to a third capacitance; and adjustments are made to the size of said MOS transistors as well as to the ratio of said size to the third capacitance. In this way, voltage distribution uniformity on the switch chain may be improved, thus increasing the overall voltage withstand ability of the radio frequency switch circuit, and reducing the occurrence of harmonic events.

Abstract: The present disclosure relates to a method for preparing a catalyst for a fuel cell, a catalyst for a fuel cell and a fuel cell including the same. More specifically, the catalyst for a fuel cell according to the present disclosure, wherein ruthenium chalcogenide including the 1T phase exists as single-walled nanotubes, can reduce manufacturing cost by exhibiting superior catalytic activity so as to replace the existing platinum catalyst and can significantly improve stability.

Abstract: Pre-conditioning circuitry for pre-conditioning a node of a circuit to support a change in operation of the circuit, wherein the circuit is operative to change a state of the node to effect the change in operation of the circuit, and wherein the pre-conditioning circuitry is configured to apply a voltage, current or charge directly to the node to reduce the magnitude of the change to the state of the node required by the circuit to achieve the change in operation of the circuit.

Abstract: Technologies for duty cycle distortion (DCD) estimation are described. A transmitter includes a first output driver comprising a first complementary metal-oxide semiconductor (CMOS) amplifier and a first attenuator coupled to an output of the first CMOS amplifier. The first CMOS amplifier receives an input signal and outputs an intermediate signal to the first attenuator. The first attenuator receives the intermediate signal and outputs an output signal having a signal swing that is less than a signal swing of the input signal. A first duty cycle correction (DCC) loop is coupled to the first output driver. The first DCC loop estimates first DCD in the intermediate signal output by the first CMOS amplifier.

Abstract: Provided are metal-air scavenger systems that use metal surfaces to harvest energy for powering microelectronic devices; such devices can be attached to exposed metal surfaces and then generate power by electrochemically oxidizing the metal surface. The disclosed devices can be configured to effect relative motion between the device and the metal, thus allowing the device to utilize an entire metal surface to generate power and also allowing the device to feed metal to itself to generate power.

Abstract: The present disclosure provides a signal converting circuit including a phase interpolator circuit and a bias voltage generation circuit. The phase interpolator circuit is configured to convert multiple input clock signals into an output clock signal according to a digital signal. The bias voltage generation circuit is electrically coupled to the phase interpolator circuit, is configured to generate a bias voltage according to reference information and is configured to output the bias voltage to the phase interpolator circuit, so that the output clock signal has a predetermined phase corresponding to one of multiple bit configurations of the digital signal. The reference information is relevant to a change of the phase interpolator circuit due to a manufacture process variation.

Abstract: Provided are electrode active materials with a porous structure and including a metal, that when loaded with sulfur serve as electrochemically superior cathode active materials. The metal structures are optionally used on their own, are coated with another material, or coats another porous structure such as a porous carbon structure that allows for excellent retention of both sulfur and polysulfides, are conductive themselves, and show long term stability and excellent cycle life.

Abstract: An output stage of an Ethernet transmitter is provided. The output stage is coupled to a resistor and includes a first output terminal, a second output terminal, a first transistor, and a first transistor group. The resistor is coupled between the first output terminal and the second output terminal. The first transistor has a first source, a first drain, and a first gate, the first source being coupled to a first reference voltage and the first drain being coupled to the second output terminal. The first transistor group is coupled to the first reference voltage and the first output terminal. The first transistor group includes multiple transistors which are connected in parallel, and the magnitude of the current flowing to the first output terminal is related to the number of transistors that are turned on.

Abstract: Disclosed is a method for the temperature control of an electrochemical system comprising a stack of electrochemical cells and interconnection plates interposed between the electrochemical cells, means for supplying gas to the electrochemical cells and means for collecting gases produced by the electrochemical cells, and means for electrically connecting the system to the outside, wherein the electrochemical device also comprises heating means integrated into the stack, said heating means comprising at least a first and a second heating element, the first heating element being disposed in a first location in the stack and the second heating element being arranged in a second location in the stack, said method comprising steps of: applying a first control command to the first heating element and a second control command to the second heating element, said control commands being configured such that a thermal gradient in the stack in the direction of the stack is maintained substantially at a defined value.

Abstract: A delay circuit includes a self-shielding circuit and a delay. The self-shielding circuit is configured to: receive an initial command signal and N initial clock signals, register the initial command signal according to a first initial clock signal among the N initial clock signals that triggers the initial command signal at earliest, shield other N?1 second initial clock signals, and output N intermediate command signals, where N is an integer greater than or equal to 2, and the N initial clock signals have a same frequency and different phases. The delay is electrically connected to the self-shielding circuit and is configured to: receive the N intermediate command signals and the N initial clock signals, and delay and output the N intermediate command signals to obtain a delayed command signal. Thus, the accuracy of signal processing can be improved.

Abstract: A nonaqueous electrolyte secondary battery includes an electrode body and a nonaqueous electrolyte solution. An electrolyte solution passage is a flow passage through which the nonaqueous electrolyte solution flows between the inside and the outside of the electrode body. A region of a negative-electrode composite material layer in contact with the electrolyte solution passage is a damming portion and a region located on the center side relative to the damming portion is a liquid retaining portion. The damming portion contains a negative electrode active material of which an electrical potential relative to a positive electrode active material is high and a ratio of expansion or contraction due to an increase or decrease in SOC is high, when compared to a negative electrode active material contained in the liquid retaining portion. The electrolyte solution passage can be closed by the damming portion in a charge state where the damming portion expands.

Abstract: Systems and methods which provide battery configurations for delivering high power while maintaining high energy density are described. Embodiments provide cylindrical batteries configured to deliver high energy density while having high power density at least in part through an electrode configuration disposing electrode material for the cathode and/or anode over an extended length of a longitudinal edge of the respective cathode or anode. An electrode configuration may provide for a continuous length of electrode material disposed along a longitudinal edge of at least one of the cathode or anode. Additionally or alternatively, an electrode configuration may provide for a plurality of electrode tabs of electrode material spaced out along a longitudinal edge of at least one of the anode or cathode.

Abstract: The present application relates to a voltage drop circuit assembly of a lithium battery and a 1.5V lithium battery. The voltage drop circuit assembly includes a PCB, an outer conductive cap and an inner conductive cap, a front surface of the PCB is provided with a positive copper ring and a negative copper ring, the positive copper ring is electrically connected with the outer conductive cap, the outer conductive cap is used as a low-voltage output positive electrode, the negative copper ring is used as a common negative electrode, a back surface of the PCB is provided with a high-voltage input copper ring, the high-voltage input copper ring is electrically connected with the inner conductive cap, and the inner conductive cap is used as a high-voltage input positive electrode.

Abstract: A signal converting circuit includes a phase interpolator circuit and a bias voltage generation circuit. The phase interpolator circuit is configured to convert a plurality of input clock signals into an output clock signal according to a digital signal. The bias voltage generation circuit is electrically coupled to the phase interpolator circuit, is configured to generate a bias voltage according to a reference information and is configured to output the bias voltage to the phase interpolator circuit, so that the output clock signal has a predetermined phase corresponding to one of a plurality of bit configurations of the digital signal, wherein the reference information is relevant to a change of the phase interpolator circuit due to a temperature variation.

Abstract: A charge pump is connected between a source and a body of the switch. Such a configuration avoids a condition in which the body diode opens for negative drain-to-source voltage (Vds) across the switch. Such a configuration also avoids a condition in which the switch control circuit generates control signals referenced to a body potential rather than a source potential, thereby allowing the switch to reliably turn off even for negative Vds. An additional gain stage ensures that the switch can be properly turned on. The techniques can be used to generate switches that enable highly linear processing of bipolar differential signals even far outside of the supply range.

Abstract: Phase detector circuitry includes first mixer circuitry configured to receive a first clock signal and a second clock signal. The first mixer circuitry includes a first plurality of transistors. The first plurality of transistors includes first transistors, second transistors, and an output transistor. The first transistors receive the first clock signal, and the second transistors receive the second clock signal. The first output transistor outputs a first output signal. The first output signal corresponds to a first phase difference between the first clock signal and the second clock signal.

Abstract: Provided are an electrode binder composition that provides an electrode that exhibits high durability even when an active material that shows a large volume change is used, an electrode coating liquid composition containing the electrode binder composition, a power storage device electrode including an electrode mixture layer containing a solid of the electrode coating liquid composition, and a power storage device including the power storage device electrode. An electrode binder composition includes (A) a polyurethane, (B) a fibrous nanocarbon material having an average fiber length of 0.5 ?m or more, and (C) water. The polyurethane is obtained by reacting together (a) a polyisocyanate, (b) a polyol, (c) a compound having one or more active hydrogen groups and a hydrophilic group, and (d) a chain extender. (b) contains an olefinic polyol having 1.5 or more active hydrogen groups and/or a carbonate diol having less than 6 carbon atoms between carbonate bond chains.