Abstract: Mask and integrated circuit fabrication approaches are described to facilitate use of so called “full phase” masks. This facilitates use of masks where substantially all of a layout is defined using phase shifting. More specifically, exposure settings including relative dosing between the phase shift mask and the trim masks are described. Additionally, single reticle approaches for accommodating both masks are considered. In one embodiment, the phase shifting mask and the trim mask are exposed using the same exposure conditions, except for relative dosing. In another embodiment, the relative dosing between the phase and trim patterns is 1.0:r, 2.0<r<4.0. These approaches facilitate better exposure profiles for the resulting ICs and can thus improve chip yield and increase throughput by reducing the need to alter settings and/or switch reticles between exposures.
Abstract: The method of fabricating a suspended microstructure with a sloped support, comprises the steps of (a) providing a member having three stacked up layers including a first substrate layer, a second temporary layer and a third photoresist layer; (b) photolithographically transferring a sloped pattern to the third photoresist layer by means of a grey scale mask; (c) etching the second layer through the third layer resulting from step (b) to obtain a surface with at least one continuous slope with a predetermined angle with respect to the first substrate layer; (d) depositing a fourth layer on the previous layers; (e) etching the fourth layer to obtain the sloped support; (f) (i) depositing a fifth planarization layer, (ii) depositing a sixth layer, and (iii) etching the sixth layer; and (g) removing the second layer and the fifth layer to obtain the suspended microstructure with the sloped support. The invention is also concerned with a suspended microstructure fabricated by the method.
Abstract: Methods and systems are disclosed for reducing resist residue defects in a semiconductor manufacturing process. The methods comprise appropriate adjustment of hardware, substrate, resist, developer, and process variables in order to remove resist residues from a semiconductor substrate structure in order to reduce resist residue defects therein, including special vapor prime and development operations.
Type:
Grant
Filed:
January 16, 2002
Date of Patent:
July 6, 2004
Assignee:
Advanced Micro Devices, Inc.
Inventors:
Khoi A. Phan, Jeffrey Erhardt, Jerry Cheng, Richard J. Bartlett, Anthony P. Coniglio, Wolfram Grundke, Carol M. Bradway, Daniel E. Sutton, Martin Mazur
Abstract: Disclosed are methods of processing a semiconductor structure, involving the steps of depositing a light-degradable surface coupling agent on a semiconductor substrate; depositing a resist over the light-degradable surface coupling agent; irradiating portions of the resist, wherein the light-degradable surface coupling agent under the irradiated portions of the resist at least partially decomposes; and developing the resist.
Type:
Grant
Filed:
January 16, 2002
Date of Patent:
June 8, 2004
Assignee:
Advanced Micro Devices, Inc.
Inventors:
Bharath Rangarajan, Michael K. Templeton, Bhanwar Singh