Abstract: A high-speed turbo decoder using a BCJR (Bahi, Cocke, Jelinek, and Raviv) algorithm or a BCJR algorithm which makes approximation by ACS computation (Add-Compare-Select computation) includes a supplier for supplying a plurality of pipelined stages of gamma metrics as a section for performing at least one of alpha metric computation and beta metric computation in the BCJR algorithm, an ACS computation portion which is constituted by a plurality of stages of cascade connections and receives the plurality of pipelined gamma metrics, a receiver that receives a computation result obtained by the ACS computation portion and updates state metrics every plurality of stages (K stages), and a memory for storing state metrics for every K stages.

Abstract: In a line quality monitoring method of detecting a code error rate by identifying a received optical signal using different identification levels and executing bit comparison after identification, an amplitude of the signal and noise power contained in the signal are detected, and a difference between the different identification levels is controlled to be inversely proportional to the amplitude of the signal and to be proportional to the noise power of the signal. Alternatively, the amplitude of the signal is controlled to be constant and the difference between the different identification levels is controlled to be proportional to the noise power of the signal.

Abstract: A channel estimation method and apparatus for GSM/EDGE digital communications systems utilizing previously unexploited properties of GSM/EDGE training sequences to permit a more efficient initial channel estimation for equalizer operation and for joint synchronization and equalizer window sizing. In particular, any consecutive 16-symbol segment of the 26-symbol GSM/EDGE training sequences is both shift invariant and order invariant; and these properties enable channel estimation to be carried out on delayed (shifted) training sequence segments, permitting ISI corrupted leading symbols to be avoided in computations and leading taps to be estimated, using the same training sequence segments, regardless of equalizer window size; and to enable all the 1–8 tap channels to be estimated without matrix inversion, permitting a significant reduction in computational complexity.

Abstract: Two kinds of user-tailored searchers, narrow-search-range searchers (3, 4) and a wide-search-range searcher (5), are set out of a plurality of groups of searchers in compliance with the features of two kinds of multi-paths in mobile communication, and are used, thereby making it possible to search efficiently with high accuracy and on reduced hardware and software scales.

Abstract: A method of decoding turbo-encoded, received data in CDMA (Code Division Multiple Access) system which carries out closed-loop control to electric power of a data transmitter, based on a signal to interference ratio, includes the steps of (a) weighting reverse-diffused, received data, based on both the signal to interference ratio and data obtained when the signal to interference ratio is measured, (b) carrying out ACS operation or comparison/selection operation in a process of updating alpha metric, a process of updating beta metric, and a process for computing likelihood, to the thus weighted, received data, and (c) compensating for results of the ACS operation, based on a predetermined value associated with a difference generated when the ACS operation or the comparison/selection operation is carried out.

Abstract: A code-division-multiple-access (CDMA) system employing spread-spectrum modulation. The CDMA system has a base station (BS), and a plurality of subscriber units (SUs). The signals transmitted between the BS and SU use spread-spectrum modulation. The apparatus for maintaining control of power from an SU to a BS, comprises sending from the SU, using spread-spectrum modulation, a SU-spreading code, and detecting at the base station, the SU-spreading code from the SU. In response to detecting the SU-spreading code at the BS, a BS-spreading code is sent to the SU, using spread-spectrum modulation. At the SU, if the BS-spreading code is detected, then transmit power of the SU is reduced. If the BS-spreading code is not detected at the SU, then transmit power of the SU is increased.

Abstract: This transmission circuit is used in, for example, a base station in CDMA mobile communication. The transmission circuit has a first delay circuit section which gives a delay to an input signal (spread signal) with a predetermined resolution, and a second delay circuit section gives a delay to the output signal of the first delay circuit section with a higher resolution than the predetermined resolution. A control section computes a first delay amount which is a maximum value that does not exceed a predetermined delay amount and can be given by a delay of the predetermined resolution, instructs the first delay circuit section the first delay amount, computes a second delay amount which is the first delay amount subtracted from the predetermined delay amount and instructs the second delay circuit section the second delay amount. By adjusting a transmission timing this way, it is possible to adjust the transmission timing among a plurality of base stations while reducing the circuit scale.

Abstract: Method for forming and determining a signal sequence, a synchronization method, a transmitting unit and a receiving unit, including the formation of signal sequences that are based on partial signal sequences, the second partial signal sequence being repeated and modulated in the process by the first partial signal sequence, and at least one of the signal sequences being a Golay sequence, and use of these partial signal sequences for the purpose of simplified calculation of correlation sums in a two-stage calculation method, with one partial correlation sum sequence being calculated first.

Abstract: A digital demodulation apparatus automatically controls gain based on a state of receiving a digital modulated signal. The digital demodulation apparatus amplifies a digital modulated signal wave received through the air with the gain automatically controlled so as to have a predetermined amplitude. In the digital demodulation apparatus, a receive level variation detector detects receive level variation, an amount of noise components of the received digital signal wave. A gain controller 15 controls the gain with a receive level variation adaptive control signal based on the detected receive level variation, the amount of noise components.

Abstract: A spread spectrum clock system (11) modulates the supply voltage for a circuit (10) in concert with the circuit clock frequency (C). The system increases the supply voltage for the circuit (10) in phase with increases in the circuit clock frequency (C). However, in the portion of the clock frequency modulation period in which the clock frequency (C) is decreasing, the system (11) also decreases the supply voltage for the circuit (10). This relationship between the circuit supply voltage and circuit clock frequency (C) may be accomplished by modulating the output (18) of a power supply (15) for the circuit (10) and applying that modulated supply voltage signal through a signal translator (30) to control modulation of a clock source (14).

Abstract: A digital receiver fast frequency and time acquisition system (200) for accurately providing both time and frequency synchronization to an incoming data stream with minimal delay to prevent any loss of incoming digital information. The invention provides synchronization with only a single synchronization word and includes a first channel select (CS) filter (204) that filters an incoming digital signal (202). A frame synchronization detector (206) then recognizes the time synchronization word from the first filtered signal. A coarse symbol time estimator (208) is then used for coarsely adjusting the time synchronization of the digital signal from the frame synchronization detector (206) and a fine frequency estimator (210) finely adjusts the frequency of the signal from the coarse symbol time estimator (208) for providing a frequency adjusted signal. A mixer (212) then combines the incoming digital signal with the frequency adjusted signal and provides a time and frequency compensated digital signal.

Abstract: An apparatus processes an equalizer output signal. The equalizer output signal is formed by transmitting an alternate mark inversion input signal over a channel and passing the transmitted signal through an adaptive equalizer. The apparatus includes a correlator circuit block that detects an incorrect convergence of the adaptive equalizer and outputs a correlator output signal. A corrector filter receives the equalizer output signal and the correlator output signal, and applies a correction to the equalizer output signal based on the correlator output signal, to form a corrected signal that is substantially a time delayed copy of the input signal.

Abstract: A single-axis receiver processing, for example, complex vestigial sideband modulated signals with an equalizer with forward and feedback filters. Forward and feedback filters have parameters that are initialized and adapted to steady state operation. Adaptive equalization employs linear predictive filtering and error term generation based on various cost criteria. Adaptive equalization includes recursive update of parameters for forward and feedback filtering as operation changes between linear and decision-feedback equalization of either single or multi-channel signals. An adaptive, linear predictive filter generates real-valued parameters that are employed to set the parameters of the feedback filter. In an initialization mode, filter parameters are set via a linear prediction filter to approximate the inverse of the channel's impulse/frequency response and a constant modulus error term for adaptation of the filter parameters.

Abstract: In a transmission node, a portion of the control information is separated into M (M is an integer) parts of control information blocks having N (N is an integer) bit length. A control information parity having (8?N) bit length is added to control information block i. The control information block is encoded to M parts of control information having 8 bit length according to a predetermined control information bit array. The control information parity and the control information bit array are set such that Hamming distance of each of the control information code is d, and Hamming distance of the control information 10B code is D (d and D are integers). In a receiving node, the control information code is separated into the control information block and the control information parity. Parity check is performed. When an error is detected, error processing is performed.

Abstract: The spread spectrum receiver employs circuits based on direct conversion techniques. These circuits enable realization of spread spectrum receivers of greatly reduced complexity and of much higher chip rates that can be implemented with the standard approach of a fully digital receiver. With these circuits, the digital processing is performed at the data symbol rate and not at a multiple of the chip rate that is customary in state-of-the art spread spectrum and CDMA receiver design.

Abstract: An adaptive equalizer processes an input signal that includes noise, pre-cursor intersymbol interference, and post-cursor intersymbol interference. The adaptive equalizer includes a feedforward filter which reduces the pre-cursor intersymbol interference and whitens the noise, a feedback filter which detects the post-cursor intersymbol interference in a signal that corresponds to the input signal, and circuitry which removes the detected post-cursor intersymbol interference from the input signal. The feedforward filter includes separate first and second coefficients. The first coefficients reduce the pre-cursor intersymbol interference and the second coefficients whiten the noise.

Abstract: An Elastic Buffer is provided to process data in a computer network and a write controller is provided to control memory storage operation of such an Elastic Buffer. The write controller may comprise a comparator mechanism which detects if link data from a source contains an IDLE signal; a Jabber counter mechanism which counts each cycle of a link clock in which an IDLE signal is not detected, and resets the count each time the IDLE signal is detected, and which asserts a DISABLE signal for a single link clock cycle if a count value reaches a programmed time-out value; and a logic gate which logically combines outputs from the comparator mechanism and the Jabber counter mechanism to generate a Write control signal for prohibiting a corresponding link data sequence from being stored in memory storage of the Elastic Buffer so as to prevent data overflow in the memory storage.

Abstract: Apparatus and devices used to achieve a computationally efficient modem having a transmit path and a receive path. The apparatuses include a Farrow phase shifter for shifting the phase of signals in the transmit path, a fractionally spaced equalizer capable of equalization and signal decimation in the receive path, a primary echo sub-canceler and a post equalizer echo canceler for canceling echoes on the receive path, and a phase locked loop and add/delete register for controlling the sampling rate of a CODEC. The method includes shifting the phase of a transmit signal using a Farrow structure, equalizing and decimating a receive signal with a fractionally spaced equalizer, canceling primary echoes on the receive signal using a sub-canceler structure and canceling remaining echoes using a post equalizer echo canceler, and adjusting the sampling rate of a CODEC using a phase locked loop and an add/delete register.

Abstract: In a wireless communication receiver (31) of a wireless communication system that utilizes transmit diversity and turbo coding, symbol probabilities (45, 46) are generated (34) based at least in part on a posteriori output probabilities (47, 48) produced by SISO decoders (35, 36).

Abstract: Switching mode power amplifiers using pulse width modulation (PWM) and pulse position modulation (PPM) for generating bandpass signals is disclosed. Fully digital implemented transmitter structures having QPSK inputs for phase and amplitude are described.