Abstract: Insulated phase change memory devices are provided that include a first electrode; a second electrode; a phase change material disposed in an electrical path between the first electrode and the second electrode; and a porous dielectric configured to concentrate heat produced by a reset current carried through the phase change material between the first electrode and the second electrode to mitigate an amount of heat that escapes from the phase change material. The porous dielectric may be an inherently porous dielectric material or a dielectric material in which porous structures are induced during fabrication. Methods of fabrication of such devices are also provided.

Abstract: A light emitting device includes a light-transmissive ceramic substrate, a light emitting element mounted on the ceramic substrate, a wiring arranged inside the ceramic substrate and electrically connected to the light emitting element, a base material faced to the ceramic substrate, and a seal member hermetically sealing a gap between the ceramic substrate and the base material. The light emitting element is arranged in a space surrounded by the ceramic substrate, the base material, and the seal member. The wiring includes a wiring layer extending in a planar direction of the ceramic substrate.

Abstract: A display device according to an embodiment may include a first sub-display panel and a second sub-display panel adjacent to the first sub-display panel in a first direction. The first sub-display panel may include a first pixel adjacent to the second sub-display panel and a first ground line disposed between the first pixel and the second sub-display panel and extending in a second direction crossing the first direction. The second sub-display panel may include a second pixel adjacent to the first sub-display panel and a second ground line disposed between the second pixel and the first sub-display panel and extending in the second direction.

Abstract: A light emitting diode device includes a substrate, a conductive via, first and second conductive pads, a driving chip, a flat layer, a redistribution layer, a light emitting diode, and an encapsulating layer. The substrate has a first surface and a second surface opposite thereto. The conductive via penetrates from the first surface to the second surface. The first and second conductive pads are respectively disposed on the first and second surface and in contact with the conductive via. The driving chip is disposed on the first surface. The flat layer is disposed over the first surface and covers the driving chip and the first conductive pad. The redistribution layer is disposed on the flat layer and electrically connects to the driving chip. The light emitting diode is flip-chip bonded to the redistribution layer. The encapsulating layer covers the redistribution layer and the light emitting diode.

Abstract: One or more electronic devices that are mounted on a substrate, including at least one cooling plate in contact with the one or more electronic devices, are encapsulated. The substrate is clamped between a first mold half and a second mold half which define a molding cavity for molding the one or more electronic devices. A cavity insert movably located in the first mold half is projected into the cavity in order to contact and apply a sealing pressure onto the at least one cooling plate. After introducing a molding compound into the cavity at a first fill pressure, the molding compound in the cavity is packed by applying a second fill pressure which is higher than the first fill pressure. During this time, the sealing pressure is maintained at values that are higher than the first fill pressure and the second fill pressure.

Abstract: A semiconductor nanosheet device including semiconductor channel layers vertically aligned and stacked one on top of another, separated by a work function metal, and a second layer between two first layers, the second layer and two first layers between the semiconductor channel layers and a substrate. A semiconductor device including a lower first layer, a second layer, and a source drain region between a first set of semiconductor channel layers vertically aligned and stacked one on top of another, and a second set of semiconductor channel layers. A method including forming a stack sacrificial layer, a stack of nanosheet layers, forming a cavity by removing the stack sacrificial layer, and simultaneously forming a first layer on an upper surface of the stack sacrificial layer, on vertical side surfaces of the set of sacrificial gates, and an upper first layer and a lower first layer in a portion of the cavity.

Abstract: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices. The method includes forming, on a substrate, first and second fin structures with an opening in between, filling the opening with a flowable isolation material, treating the flowable isolation material with a plasma, and removing a portion of the plasma-treated flowable isolation material between the first and second fin structures.

Abstract: A method of manufacturing a semiconductor structure includes: forming a first oxide layer over a landing pad layer; forming a middle patterned dielectric layer over the first oxide layer; sequentially forming a second oxide layer and a top dielectric layer over the middle patterned dielectric layer; forming a trench through the top dielectric layer, the second oxide layer and the first oxide layer; conformally forming a bottom conductive layer in the trench; removing a portion of the top dielectric layer adjacent to the trench to expose a portion of the second oxide layer beneath the portion of the top dielectric layer; and performing an etching process to remove the second oxide layer and the first oxide layer. A semiconductor structure is also provided.

Abstract: A color filter unit and a display apparatus including the same is provided, wherein the color filter unit includes an upper substrate, a first-color color filter layer, a second-color color filter layer, and a third-color color filter layer on a first surface that is a lower surface of the upper substrate, a transparent layer on the first-color color filter layer and having one or more protrusions in a direction away from the first surface, a second color quantum dot layer on the second-color color filter layer, and a third color quantum dot layer on the third-color color filter layer.

Abstract: A method of promoting adhesion between a dielectric layer of a semiconductor device and a metal fill deposited within a trench in the dielectric layer, including performing an ion implantation process wherein an ion beam formed of an ionized dopant species is directed into the trench at an acute angle relative to a top surface of the dielectric layer to form an implantation layer in a sidewall of the trench, and depositing a metal fill in the trench atop an underlying bottom metal layer, wherein the metal fill adheres to the sidewall.

Abstract: A method for manufacturing a nitride semiconductor device includes the steps of growing a GaN channel layer on an SiC substrate using a vertical MOCVD furnace set at a first temperature using H2 as a carrier gas, and TMG and NH3 as raw materials, holding the SiC substrate having the grown GaN channel layer in the MOCVD furnace set at a second temperature higher than the first temperature using H2 as a carrier gas, the MOCVD furnace being supplied with NH3, and growing an InAlN layer on the GaN channel layer using the MOCVD furnace set at a third temperature lower than the first temperature using N2 as a carrier gas, and TMI, TMA, and NH3 as raw materials.

Abstract: The invention relates to a method for fabricating a semiconductor device. The method includes providing a cavity structure comprising a seed area with a seed material. The method further includes growing, within the cavity structure, a quantum dot structure in a first growth direction from a seed surface of the seed material and growing, in the first growth direction, a first embedding layer on a first surface of the quantum dot structure. The method further includes removing the seed material and growing, within the cavity structure, on a second surface of the quantum dot structure, a second embedding layer in a second growth direction. The second surface of the quantum dot structure is different from the first surface of the quantum dot structure and the second growth direction is different from the first growth direction. The invention further relates to devices obtainable by such a method.

Abstract: The invention comprises a light emitting diode chip and a package substrate. The light emitting diode chip is provided with a semiconductor epitaxial structure, a lateral extending interface structure, a chip conductive structure, an N-type electrode located above the semiconductor epitaxial structure and a P-type bypass detection electrode located on the lateral extending interface structure. The chip conductive structure is provided with a P-type main electrode located on a lower side. The package substrate comprises a plurality of electrode contacts through which the N-type electrode, the P-type bypass detection electrode and the P-type main electrode are connected, and a process quality of a alternative substrate adhesive layer in one of the semiconductor epitaxial structure and the chip conductive structure and a chip-substrate bonding adhesive layer between the P-type main electrode and the package substrate is evaluated by detecting electrical characteristics.