Abstract: Systems and methods for performing snapshots in a storage environment employing distributed block virtualization. In one embodiment, the system may include a volume server, a first and a second host computer system, and a plurality of physical block devices. The volume server may be configured to aggregate storage in the plurality of physical block devices into a plurality of logical volumes, where a particular logical volume includes storage from at least two physical block devices. The volume server may further be configured to make a first and a second subset of the logical volumes available to the first and second host computer systems for input/output, respectively. The first subset and the second subset may be at least partially nonoverlapping, and a second logical volume may be configured to store a snapshot of data stored in a first logical volume logical volume.

Abstract: The invention relates to a semiconductor memory module having a plurality of memory chips arranged in at least one row and at least one buffer chip which drives and receives clock signals and command and address signals to the memory chips and data signals to and from the memory chips via a clock, address, command and data bus inside the module and which forms an interface to an external primary memory bus. The semiconductor memory module has an even number of buffer chips arranged on it and all of the memory chips are connected to two respective buffer chips at least by one signal line type from a signal group and just to one of the two buffer chips by the remaining signal lines from the group.

Abstract: A storage power optimized server system includes a high performance spinning hard drive for storing a first set of data and a power controlled hard drive for storing a second set of data. The high performance spinning hard drive is continuously driven while the power controlled hard drive may have a lower power consumption, slower access time or higher capacity than the high performance spinning hard drive. The first and second set of data may be based on one or more data conditions. The first set of data may include data that has been requested at a rate above a predetermined threshold, or after a predetermined file age date, or after a predetermined last access date. The second set of data may include data that has been requested at a rate below the predetermined request rate threshold, or before a predetermined file age, or before a predetermined last access date.

Abstract: Provided are techniques for cache management. An incoming request to access a first data block is received. A probability of how likely a second data block may be accessed based on the access of the first data block is determined. Whether the probability exceeds a read ahead threshold is determined. The second data block is prefetched in response to determining that the probability exceeds the read ahead threshold.

Abstract: A storage unit connected to other storage units, each having of first disk drives, includes second disk drives; a first receiving unit receiving copies of first storage data, stored in storage blocks created by logically partitioning a data storage area of the first disk drives, and first identifiers identifying the storage blocks, from the other storage units; a first operation controller calculating an exclusive OR of the copies of the first storage data, with a correspondence established among the first identifiers, from the copies of the first storage data received by the first receiving unit; and a first storage controller storing a calculation result of the exclusive OR from the first operation controller, into storage blocks of the second disk drives having second identifiers that correspond to the first identifiers and that individually identify storage blocks created by logically partitioning a data storage area of the second disk drives.

Abstract: A method for operating a storage system includes providing a primary storage device and a secondary storage device. Data from a first storage volume is copied to a second storage volume using an internal mirror operation, the first and second storage volumes being provided within the primary storage device. The data received from the first volume is copied from the second storage volume to a third storage volume using a remote copy operation, the third storage volume being provided in the secondary storage device. The second storage volume is used for the remote copying to reduce the IO impact on the first volume. The third storage volume copies the data received from the second volume to a fourth storage volume using an internal mirror operation, the fourth storage volume being provided within the secondary storage device.

Abstract: In a computer system that employs virtual memory, multiple versions of a given page are stored: a directory version, a table version, and a data version. The data version contains the data that a software object believes to be stored in the page. The directory and table versions of the page contains versions of the page's contents that have been modified in some manner to comply with a restriction on the address translation map employed by the virtual address system. When a page is being used by the virtual address system as a directory or table, then the directory or table versions, respectively, of that page are used. When a page is the target of a read request, the data version of the page is used.

Abstract: A system and method for virtualization of processor resources is presented. A thread is created on a processor and the processor's local memory is mapped into an effective address space. In doing so, the processor's local memory is accessible by other processors, regardless of whether the processor is running. Additional threads create additional local memory mappings into the effective address space. The effective address space corresponds to either a physical local memory or a “soft” copy area. When the processor is running, a different processor may access data that is located in the first processor's local memory from the processor's local storage area. When the processor is not running, a softcopy of the processor's local memory is stored in a memory location (i.e. locked cache memory, pinned system memory, virtual memory, etc.) for other processors to continue accessing.

Abstract: There is disclosed a controller included in a flash memory system attachable to a memory interface of a host system. The controller performs a process for minimizing the maximum number of defective blocks to be classified into each zone, by using a plurality of replacement tables or a plurality of functions. Specifically, a dispersion process unit included in the controller associates virtual block addresses VBA with physical block addresses PBA so as to minimize the maximum number of defective blocks to be classified into each zone. The flash memory system may have a plurality of replacement tables describing correspondence between virtual block addresses VBA and physical block addresses PBA. Or, in the flash memory system, plural kinds of functions for setting correspondence between virtual block addresses VBA and physical block addresses PBA may be defined by the controller.

Abstract: In a storage system having a plurality of control units each connected with a plurality of disk units, it is provided that a replication is created in the volume of the disk units connected to different control units. The replication creation unit of a given control unit creates a replication in the volume of the disk unit connected to other control units in such a manner that the original volume information, the replication volume information in the control unit and information on the other control units are registered as volume pair information. Based on this volume pair information, a replication creation request is transmitted to the other control units.

Abstract: A splittable/connectible bus 140 and a network 1000 for transmitting coherence transactions between CPUs are provided between the CPUs, and a directory 160 and a group setup register 170 for storing bus-splitting information are provided in a directory control circuit 150 that controls cache invalidation. The bus is dynamically set to a split or connected state to fit a particular execution form of a job, and the directory control circuit uses the directory in order to manage all inter-CPU coherence control sequences in response to the above setting, while at the same time, in accordance with information of the group setup register, omitting dynamically bus-connected CPU-to-CPU cache coherence control, and conducting only bus-split CPU-to-CPU cache coherence control through the network. Thus, decreases in performance scalability due to an inter-CPU coherence-processing overhead are relieved in a system having multiple CPUs and guaranteeing inter-CPU cache coherence by use of hardware.